Semiconductor package and fabricating method thereof
A semiconductor package includes a first package comprising a circuit board and a first semiconductor die mounded on the circuit board, and a second package comprising a mounting board. At least one second semiconductor die may be mounted on the mounting board, and one or more leads may be electrically connected to the mounting board and/or the second semiconductor die. An adhesion member may bond the first package to the second package, and an encapsulant may encapsulate the first package and the second package. the circuit board, the mounting board, and the one or more leads may be arranged to surround the first semiconductor die and the second semiconductor die, and the plurality of leads may be electrically connected to the circuit board and to a constant potential or ground, to reduce the effects of external electromagnetic interference upon the semiconductor package.
1. A semiconductor package comprising:
a first package comprising a circuit board and a first semiconductor die mounted on the circuit board;
a second package comprising a mounting board, at least one second semiconductor die mounted on the mounting board, and a plurality of leads electrically connected to the mounting board and/or the second semiconductor die;
an adhesion member bonding the first package to the second package; and
an encapsulant encapsulating the first package and the second package,
wherein the circuit board, the mounting board, and the plurality of leads are arranged to surround the first semiconductor die and the second semiconductor die, and the plurality of leads are electrically connected to the circuit board.
2. The semiconductor package according to claim 1 , wherein the first package and the second package are stacked such that the first and second semiconductor die are positioned one over the other with the adhesion member positioned between the first and second semiconductor die, and wherein at least one among the plurality of leads is grounded.
3. The semiconductor package according to claim 1 , wherein the mounting board and/or the second semiconductor die are electrically connected to the plurality of leads by conductive wires.
4. The semiconductor package according to claim 3 , wherein the circuit board and the first semiconductor die are electrically connected to each other by conductive bumps.
5. The semiconductor package according to claim 4 , wherein a portion of each of the conductive wires that is attached to the second semiconductor die is surrounded by the adhesion member.
6. The semiconductor package according to claim 1 , wherein surfaces of the circuit board and the mounting board opposite those on which the first and second semiconductor die are mounted are exposed by the encapsulant, and wherein the circuit board further comprises conductive members formed on the surface of the circuit board that is exposed by the encapsulant.
7. The semiconductor package according to claim 1 , wherein each of the plurality of leads has a first region comprising a first electrical connection to the mounting board and/or the second semiconductor die, a second region comprising a second electrical connection to the circuit board, and a third region connecting the first and second regions to each other.
8. The semiconductor package according to claim 7 , wherein the third region is perpendicular to the first and second regions.
9. The semiconductor package according to claim 7 , wherein surfaces of the circuit board and the mounting board opposite those on which the first and second semiconductor die are mounted are exposed by the encapsulant, and wherein the encapsulant exposes the first region of each of the plurality of leads to the exterior of the semiconductor package.
10. The semiconductor package according to claim 9 , wherein an exposed portion of the first region is on an opposite side of a non-exposed portion of the first region that comprises the first electrical connection.
11. A system comprising:
a first semiconductor package comprising:
a first package comprising a first semiconductor die mounted on a first circuit board;
a second package comprising a second semiconductor die mounted on a mounting board, and a plurality of leads electrically connected to the second semiconductor die and to the first circuit board;
an adhesion member bonding the first package to the second package;
an encapsulant that encapsulates the first package and the second package, wherein each of the plurality of leads has a first region comprising a first electrical connection to the mounting board and/or the second semiconductor die, a second region comprising a second electrical connection to the first circuit board, and a third region connecting the first and second regions to each other, wherein surfaces of the first circuit board and the mounting board opposite those on which the first semiconductor die and the second semiconductor die are mounted are exposed by the encapsulant, and wherein the encapsulant exposes a respective portion of the first region on an opposite side of a non-exposed portion of the first region of each of the plurality of leads to the exterior of the first semiconductor package; and
a second semiconductor package comprising:
one or more semiconductor die mounted to a second circuit board, the second circuit board comprising a plurality of conductive members electrically connected to the second circuit board and to the respective portion of the first region of each of the plurality of leads exposed to the exterior of the first semiconductor package by the encapsulant.
12. The system according to claim 11 , wherein the plurality of leads are formed to surround the first semiconductor die and second semiconductor die.
13. The system according to claim 11 , wherein the mounting board and/or the second semiconductor die are connected to the plurality of leads by conductive wires.
14. The system according to claim 11 , wherein the circuit board and the first semiconductor die are electrically connected to each other by conductive bumps.
15. A system comprising:
a first semiconductor package comprising:
a first package comprising a first semiconductor die mounted on a first circuit board;
a second package comprising a second semiconductor die mounted on a mounting board, and a plurality of leads electrically connected to the second semiconductor die and to the first circuit board;
an adhesion member bonding the first package to the second package;
an encapsulant that encapsulates the first package and the second package, wherein each of the plurality of leads has a first region comprising a first electrical connection to the mounting board and/or the second semiconductor die, a second region comprising a second electrical connection to the first circuit board, and a third region connecting the first and second regions to each other, wherein surfaces of the first circuit board and the mounting board opposite those on which the first semiconductor die and the second semiconductor die are mounted are exposed by the encapsulant, and wherein the encapsulant exposes to the exterior of the first semiconductor package, a respective portion of a side of the second region of each of the plurality of leads opposite the second electrical connection to the first circuit board; and
a second semiconductor package comprising:
one or more semiconductor die mounted to a second circuit board, the second circuit board comprising a plurality of conductive members electrically connected to the second circuit board and to the respective portion of the second region of each of the plurality of leads exposed to the exterior of the first semiconductor package by the encapsulant.
16. The system according to claim 15 , wherein the plurality of leads are formed to surround the first semiconductor die and second semiconductor die.
17. The system according to claim 15 , wherein the mounting board and/or the second semiconductor die are connected to the plurality of leads by conductive wires.
18. The system according to claim 15 , wherein the circuit board and the first semiconductor die are electrically connected to each other by conductive bumps.
19. The system according to claim 15 , wherein the first package and the second package are stacked such that the first and second semiconductor die are positioned one over the other with the adhesion member positioned between the first and second semiconductor die.
20. The system according to claim 15 , wherein the encapsulant exposes the first region of each of the plurality of leads to the exterior of the first semiconductor package.