High speed transceiver based on concatenates of a leech lattice with binary and nonbinary codes

1. A cable assembly, comprising:

a transceiver device configured for communicating a plurality of signals via a communication link, and comprising a memory storing executable instructions; and

a processor, communicatively coupled to the memory, that facilitates execution of the executable components, comprising:

a constellation component configure for generating a constellation of modulated points from a plurality of signals received; and

a lattice component configured for generating a leech lattice within the constellation of modulated points by mapping dimensions of the leech lattice to the modulated points, the leech lattice comprising a concatenation of codes.

2. The cable assembly of claim 1 , wherein the lattice component is further configured for mapping the modulated points to twenty four dimensions of the leech lattice in the constellation.

3. The cable assembly of claim 1 , further comprising a forward error correction encoder that generates a plurality of forward error correction codes based on the plurality of signals and generates an output to the constellation component.

4. The cable assembly of claim 1 , wherein the codes are at least one of binary or non-binary codes.

5. The cable assembly of claim 1 , further comprising a digital to analog converter component configured for receiving a set of twenty four symbols from the constellation component and communicating a digital signal based on the set of twenty four symbols to a decoder configured for decoding the set of twenty four symbols according to the leech lattice of the constellation.

6. The cable assembly of claim 1 , wherein further comprising a decoder component configured for decoding a plurality of hexacodes received that are encoded based on the concatenation of the codes of the leech lattice.

7. The cable assembly of claim 1 , further comprising a forward error correction code rate component configured for setting a symbol rate to the constellation component for processing the constellations of modulated points into a set of twenty four symbols.

8. The signal processing system of claim 1 , wherein the leech lattice component is further configured for defining a partition of the modulated points in a twenty four dimensional space to enable an encoding of the bits to the leech lattice.

9. A transceiver device comprising:

a memory configured to store computer-executable instructions; and

a processor, coupled to the memory, configured to facilitate execution of computer-executable instructions to perform operations, the operations comprising:

generating a constellation of modulated points; and

generating a leech lattice of the modulated points in the constellation by mapping a concatenation of codes to dimensions of the leech lattice.

10. The transceiver device of claim 9 , wherein the operations further comprise:

mapping a concatenation of at least one of non-binary codes or binary codes to the dimensions of the leech lattice.

11. The transceiver device of claim 9 , wherein the operations further comprise:

selecting a subset of bits from a multi-level plurality of bits on the leech lattice and encoding the subset of bits with a forward error correction code for transmission.

12. The transceiver device of claim 9 , wherein the operations further comprise:

generating a variable forward error correction code to be encoded into a hexacode with a subset of bits to the leech lattice for a transmission.

13. The transceiver device of claim 9 , wherein the operations further comprise:

encoding bits of the binary code in a hexacode with a variable forward error correction code.

14. The transceiver device of claim 9 , wherein the operations further comprise:

transmitting approximately three bits per Hertz by utilizing twenty four dimensions of the leech lattice of the constellation to communicate twenty four symbols.

15. A signal processing method, comprising:

generating, by a device with a processor, a constellation of modulated points from a plurality of signals received; and

mapping dimensions of a leech lattice to the modulated points to generate the leech lattice with the modulated points in the constellation based on a concatenation of binary or non-binary codes.

16. The signal processing method of claim 15 , further comprising:

generating a plurality of forward error correction codes to encode a subset of bits with the plurality of forward error correction codes and multi-level bits on the leech lattice.

17. The signal processing method of claim 15 , further comprising:

mapping a reed solomon code to a plurality of symbols of a hexacode for the concatenation of the binary and the non-binary codes into the leech lattice of the constellation.

18. The signal processing method of claim 15 , further comprising:

decoding a hexacode of the leech lattice from a received transmission with a multi-level decoder; and

communicating an estimate of the hexacode to a forward error correction code decoder to correct for errors detected.

19. The signal processing method of claim 18 , further comprising:

decoding a subset of the leech lattice comprising a hexacode at the forward error correction decoder; and

decoding a remainder of the leech lattice at the multi-level decoder.

20. The signal processing method of claim 18 , further comprising:

selecting a subset of bits from a multi-level plurality of bits on the leech lattice;

encoding the subset of bits with a forward error correction code; and

transmitting a set of twenty four symbols over a channel.