IP Library Granted Patent US 9,316,785
Granted Patent B2
US 9,316,785 · App. 14/509,914 · Granted Apr 19, 2016

Integration of an unprocessed, direct-bandgap chip into a silicon photonic device

Inventors: Stephen B. Krasulick (Albuquerque, NM); John Dallesasse (Geneva, IL); Amit Mizrahi (Albuquerque, NM); Timothy Creazzo (Albuquerque, NM); Elton Marchena (Albuquerque, NM); John Y. Spann (Albuquerque, NM)
Assignee: Skorpios Technologies, Inc.
G02B6/1225G02B6/12004H01S5/02252G02B2006/12176H01S5/005
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Quick Facts
Patent No.
US 9,316,785
App. No.
14/509,914
Granted
Apr 19, 2016
Kind
B2
Abstract

A composite device for splitting photonic functionality across two or more materials comprises a platform, a chip, and a bond securing the chip to the platform. The platform comprises a base layer and a device layer. The device layer comprises silicon and has an opening exposing a portion of the base layer. The chip, a III-V material, comprises an active region (e.g., gain medium for a laser). The chip is bonded to the portion of the base layer exposed by the opening such that the active region of the chip is aligned with the device layer of the platform. A coating hermitically seals the chip in the platform.

Claims (32)

1. A method of fabricating a composite device for splitting photonic functions between two or more materials, the method comprising:

aligning a first mask with a target;

etching a recess in a platform based on the first mask aligned with the target;

bonding a chip to the platform, wherein:

the chip is bonded in the recess of the platform;

a gap separates a side of the chip and a wall of the recess; and

the chip bonded to the platform forms the composite device;

applying a contact metal on top of the chip;

at least partially covering both the platform and the chip with a first material, thus filling the gap;

applying a second mask that defines an area to etch over the gap;

partially removing first material in the gap based on the second mask defining the area to etch over the gap;

at least partially filling the gap with a second material;

removing a portion of the second material from the gap;

at least partially covering both the platform and the chip with a third material;

applying a third mask to define an area to remove from the chip to form a feature on the chip;

removing material from the chip to form the feature on the chip; and

covering the chip with a fourth material.

2. The method of fabricating the composite device as recited in claim 1 , wherein the second material is amorphous silicon.

3. The method of fabricating the composite device as recited in claim 1 , wherein the chip comprises a gain medium for a laser and the platform is made of silicon.

4. The method of fabricating the composite device as recited in claim 1 , further comprising forming pedestals in the recess.

5. The method of fabricating the composite device as recited in claim 1 , wherein covering the chip with the fourth material creates a hermetic seal.

6. The method of fabricating the composite device as recited in claim 1 , wherein:

the platform comprises a device layer;

the platform comprises a base layer; and

the device layer comprises a waveguide.

7. The method of fabricating the composite device as recited in claim 6 , wherein the chip is bonded to the base layer of the platform.

8. The method of fabricating the composite device as recited in claim 1 , wherein the first material, the third material, and the fourth material are silicon dioxide (SiO2).

9. The method of fabricating the composite device as recited in claim 1 , wherein:

the third mask is aligned using the target; and

the target is on the platform.

10. The method of fabricating the composite device as recited in claim 1 , further comprising etching the third material.

11. The method of fabricating the composite device as recited in claim 1 , further aligning a fourth mask to define a second area to remove from the chip to form a second feature on the chip, wherein the feature is a ridge of a waveguide and the second feature is a shoulder of the waveguide.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 22, 2017
From: PACIFIC WESTERN BANK
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 044751/0469 →
SECURITY INTEREST Recorded Oct 23, 2017
From: SKORPIOS TECHNOLOGIES, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 044272/0557 →
NUNC PRO TUNC ASSIGNMENT Recorded Mar 4, 2016
From: KRASULICK, STEPHEN B.; DALLESASSE, JOHN; MIZRAHI, AMIT; CREAZZO, TIMOTHY; MARCHENA, ELTON; SPANN, JOHN Y.
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 038001/0420 →
Continuity (3)
Provisional Application 62028611 · Jul 24, 2014
Provisional Application 61888863 · Oct 9, 2013
Related Publication 20150098676A1 · Apr 9, 2015