IP Library Granted Patent US 9,640,623
Granted Patent B2
US 9,640,623 · App. 14/517,185 · Granted May 2, 2017

Semiconductor device with improved field plate

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Quick Facts
Patent No.
US 9,640,623
App. No.
14/517,185
Granted
May 2, 2017
Kind
B2
Abstract

A transistor device includes a semiconductor body, a spacer layer, and a field plate. The spacer layer is over at least a portion of a surface of the semiconductor body. The field plate is over at least a portion of the spacer layer, and includes a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer. By including the semiconductor layer between the first refractory metal interposer layer and the second refractory metal interposer layer, the electromigration of metals in the field plate is significantly reduced. Since electromigration of metals in the field plate is a common cause of transistor device failures, reducing the electromigration of metals in the field plate improves the reliability and lifetime of the transistor device.

Claims (80)

1. A transistor device comprising:

a semiconductor body;

a spacer layer on at least a portion of the semiconductor body; and

a field plate on at least a portion of the spacer layer, wherein the field plate comprises a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer,

wherein the first refractory metal interposer layer, the semiconductor layer and the second refractory metal interposer layer each have the same width.

2. The transistor device of claim 1 wherein the semiconductor layer comprises silicon, and wherein the field plate further comprises:

a first adhesion layer on the spacer layer opposite the semiconductor body;

a third refractory metal interposer layer over the first adhesion layer; and

a second adhesion layer between the third refractory metal interposer layer and the first refractory metal interposer layer.

3. The transistor device of claim 2 wherein:

the first refractory metal interposer layer has a thickness between 75 Å and 150 Å;

the second refractory metal interposer layer has a thickness between 75 Å and 150 Å; and

the semiconductor layer has a thickness between 350 Å and 450 Å.

4. The transistor device of claim 3 wherein the first refractory metal interposer layer and the second refractory metal interposer layer comprise nickel.

5. The transistor device of claim 1 wherein the first refractory metal interposer layer and the second refractory metal interposer layer comprise nickel.

6. The transistor device of claim 1 wherein the field plate further comprises:

a first adhesion layer between the spacer layer and the first refractory metal interposer layer; and

a conductive metal protective overlayer over the second refractory metal interposer layer.

7. The transistor device of claim 6 wherein:

the semiconductor layer comprises silicon;

the first refractory metal interposer layer and the second refractory metal interposer layer comprise nickel;

the first adhesion layer comprises titanium; and

the conductive metal protective overlayer comprises titanium.

8. The transistor device of claim 6 wherein:

the first adhesion layer has a thickness between 50 Å and 150 Å thick;

the first refractory metal interposer layer has a thickness between 75 Å and 150 Å;

the semiconductor layer has a thickness between 350 Å and 450 Å;

the second refractory metal interposer layer has a thickness between 75 Å and 150 Å; and

the conductive metal protective overlayer has a thickness between 75 Å and 125 Å.

9. The transistor device of claim 8 wherein:

the semiconductor layer comprises silicon;

the first refractory metal interposer layer and the second refractory metal interposer layer comprise nickel;

the first adhesion layer comprises titanium; and

the conductive metal protective overlayer comprises titanium.

10. The transistor device of claim 1 further comprising a source electrode and a drain electrode in electrical contact with the semiconductor body, wherein the first refractory metal interposer layer, the semiconductor layer and the second refractory metal interposer layer each have the same width along an axis that is extends between the source electrode and the drain electrode.

11. The transistor device of claim 10 further comprising a gate on top of the semiconductor body, wherein the field plate is spaced apart from the gate in a direction parallel to a top surface of the gate so that the field plate does not overlap the gate.

12. The transistor device of claim 11

wherein at least one of the source electrode and the drain electrode includes the same metal structure as the field plate.

13. The transistor device of claim 12 wherein the field plate is electrically connected to the source electrode via a separate conductive path that runs outside an active region of the transistor device.

14. The transistor device of claim 13 wherein a plurality of conductive paths are provided between the field plate and the source electrode.

15. A transistor device comprising:

a semiconductor body;

a spacer layer over at least a portion of the semiconductor body; and

a field plate over at least a portion of the spacer layer, wherein the field plate comprises a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer,

wherein the field plate further comprises:

a first adhesion layer on the spacer layer opposite the semiconductor body;

a third refractory metal interposer layer over the first adhesion layer;

a second adhesion layer between the third refractory metal interposer layer and the first refractory metal interposer layer; and

a protective overlayer over the second refractory metal interposer layer.

16. The transistor device of claim 15 wherein:

the semiconductor layer comprises silicon;

the first refractory metal interposer layer, the second refractory metal interposer layer, and the third refractory metal interposer layer comprise nickel;

the first adhesion layer comprises titanium;

the second adhesion layer comprises platinum; and

the protective overlayer comprises titanium.

17. The transistor device of claim 15 wherein:

the first adhesion layer has a thickness between 50 Å and 150 Å thick;

the third refractory metal interposer layer has a thickness between 100 Å and 300 Å thick;

the second adhesion layer has a thickness between 75 Å and 150 Å thick;

the first refractory metal interposer layer has a thickness between 75 Å and 150 Å;

the semiconductor layer has a thickness between 350 Å and 450 Å;

the second refractory metal interposer layer has a thickness between 75 Å and 150 Å; and

the protective overlayer has a thickness between 75 Å and 125 Å.

18. The transistor device of claim 17 wherein:

the semiconductor layer comprises silicon;

the first refractory metal interposer layer, the second refractory metal interposer layer, and the third refractory metal interposer layer comprise nickel;

the first adhesion layer comprises titanium;

the second adhesion layer comprises platinum; and

the protective overlayer comprises titanium.

19. The transistor device of claim 15 wherein a separate conductive path between the field plate and the source electrode that runs outside an active region of the transistor device.

20. The transistor device of claim 15 , further comprising:

a gate on top of the semiconductor body, wherein the field plate is spaced apart from the gate in a direction parallel to a top surface of the gate so that the field plate does not overlap the gate; and

a source electrode and a drain electrode in electrical contact with the semiconductor body, wherein at least one of the source electrode and the drain electrode includes the same metal structure as the field plate.

21. A method for manufacturing a transistor device comprising:

providing a semiconductor body;

providing a spacer layer over at least a portion of the semiconductor body;

providing a field plate over at least a portion of the spacer layer, wherein providing the field plate comprises providing a semiconductor layer between a first refractory metal interposer layer and a second refractory metal interposer layer; and

annealing the field plate such that the first refractory metal interposer layer, the second refractory metal interposer layer, and the semiconductor layer at least partially combine.

22. The method of claim 21 wherein the first refractory metal interposer layer and the second refractory metal interposer layer comprise nickel.

23. The transistor device of claim 21 , wherein the first refractory metal interposer layer, the second refractory metal interposer layer, and the semiconductor layer combine into a single silicide layer as a result of the annealing process.

Assignments (8)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Mar 26, 2026
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075280/0919 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 64185/0755 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0113 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0381 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0467 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0588 →
SECURITY INTEREST Recorded Jun 30, 2023
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 064185/0755 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2015
From: HAGLEITNER, HELMUT
To: CREE, INC.
Reel/Frame 035558/0796 →