IP Library Granted Patent US 9,564,863
Granted Patent B1
US 9,564,863 · App. 14/536,443 · Granted Feb 7, 2017

Circuits and methods for variable gain amplifiers

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Quick Facts
Patent No.
US 9,564,863
App. No.
14/536,443
Granted
Feb 7, 2017
Kind
B1
Abstract

A variable gain amplifier circuit includes a differential pair of transistors and a variable current source circuit. The differential pair of transistors generates an output signal based on an input signal. The variable current source circuit is coupled to the differential pair of transistors. A gain of the output signal relative to the input signal varies in response to variations in a bias current through the variable current source circuit. The variable gain amplifier circuit maintains a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit.

Claims (53)

1. A variable gain amplifier circuit comprising:

a differential pair of transistors to generate an output signal based on an input signal;

a variable current source circuit coupled to the differential pair of transistors, wherein a gain of the output signal relative to the input signal varies in response to variations in a bias current through the variable current source circuit, and

wherein the variable gain amplifier circuit maintains a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit; and

an operational amplifier circuit to generate a supply voltage for the variable gain amplifier circuit based on a reference voltage and the common mode voltage of the output signal.

2. The variable gain amplifier circuit of claim 1 ,

wherein the operational amplifier circuit is a feedback amplifier circuit that maintains the common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit.

3. The variable gain amplifier circuit of claim 1 further comprising:

a first resistor coupled to a first transistor in the differential pair of transistors; and

a second resistor coupled between the first resistor and a second transistor in the differential pair of transistors, wherein a first input of the operational amplifier circuit is coupled between the first and the second resistors, and wherein a second input of the operational amplifier circuit receives the reference voltage.

4. The variable gain amplifier circuit of claim 1 further comprising:

a first resistor coupled between an output of the operational amplifier circuit and a first transistor in the differential pair of transistors; and

a second resistor coupled between the output of the operational amplifier circuit and a second transistor in the differential pair of transistors.

5. The variable gain amplifier circuit of claim 4 further comprising:

a third resistor coupled to the first transistor; and

a fourth resistor coupled between the third resistor and the second transistor, wherein an input of the operational amplifier circuit is coupled between the third and the fourth resistors.

6. The variable gain amplifier circuit of claim 1 , wherein the variable current source circuit comprises a current source transistor and first and second switch circuits coupled to a control input of the current source transistor, wherein adjusting a conductive state of the current source transistor varies the bias current through the variable current source circuit, wherein the current source transistor is turned on by closing the first switch circuit, and wherein the current source transistor is turned off by closing the second switch circuit.

7. A variable gain amplifier circuit comprising:

a differential pair of transistors to generate an output signal based on an input signal;

a variable current source circuit coupled to the differential pair of transistors, wherein a gain of the output signal relative to the input signal varies in response to variations in a bias current through the variable current source circuit; and

a feedback amplifier circuit to maintain a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit.

8. The variable gain amplifier circuit of claim 1 , wherein an adaptation circuit in a decision feedback equalizer circuit generates control signals for controlling the bias current through the variable current source circuit.

9. The variable gain amplifier circuit of claim 8 , wherein the decision feedback equalizer circuit further comprises a combiner circuit to generate a combined signal based at least in part on the output signal of the variable gain amplifier circuit, and wherein the adaptation circuit generates the control signals based on the combined signal.

10. A decision feedback equalizer circuit comprising:

a variable gain amplifier circuit comprising a differential pair of transistors to generate an output signal based on an input signal, wherein the variable gain amplifier circuit further comprises a variable current source circuit coupled to the differential pair of transistors, wherein a gain of the output signal relative to the input signal varies in response to variations in a bias current through the variable current source circuit, and wherein the variable gain amplifier circuit maintains a common mode voltage of the output signal substantially constant over the variations in the bias current;

a combiner circuit to generate a combined signal based at least in part on the output signal of the variable gain amplifier circuit; and

an adaptation circuit to generate control signals for varying the bias current through the variable current source circuit based on the combined signal.

11. The decision feedback equalizer circuit of claim 10 , wherein the variable gain amplifier circuit further comprises:

an operational amplifier circuit to generate a supply voltage for the variable gain amplifier circuit based on a difference between a reference voltage and the common mode voltage of the output signal.

12. The decision feedback equalizer circuit of claim 10 , wherein the variable gain amplifier circuit further comprises:

a feedback amplifier circuit to maintain the common mode voltage of the output signal substantially constant over the variations in the bias current, wherein the feedback amplifier circuit provides a supply voltage to load circuits in the variable gain amplifier circuit based on the common mode voltage of the output signal.

13. The decision feedback equalizer circuit of claim 12 , wherein the variable gain amplifier circuit further comprises:

a first resistor coupled to a first transistor in the differential pair of transistors; and

a second resistor coupled between the first resistor and a second transistor in the differential pair of transistors, wherein a first input of the feedback amplifier circuit is coupled between the first and the second resistors, and wherein a second input of the feedback amplifier circuit receives a reference voltage.

14. The decision feedback equalizer circuit of claim 12 , wherein the differential pair of transistors comprises first and second transistors, and wherein the variable gain amplifier circuit further comprises:

a first resistor coupled between an output of the feedback amplifier circuit and the first transistor; and

a second resistor coupled between the output of the feedback amplifier circuit and the second transistor, wherein the first and the second resistors are the load circuits.

15. The decision feedback equalizer circuit of claim 14 , wherein the variable gain amplifier circuit further comprises:

a third resistor coupled to the first transistor; and

a fourth resistor coupled between the third resistor and the second transistor, wherein an input of the feedback amplifier circuit is coupled between the third and the fourth resistors.

16. A method comprising:

generating an output signal based on an input signal using a differential pair of transistors in an amplifier circuit;

varying a gain of the output signal relative to the input signal in response to variations in a bias current through a variable current source circuit in the amplifier circuit; and

generating a supply voltage for the amplifier circuit using an operational amplifier circuit to maintain a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit.

17. The method of claim 16 , wherein the operational amplifier circuit generates the supply voltage for the amplifier circuit based on a reference voltage and the common mode voltage of the output signal.

18. The method of claim 17 , wherein generating a supply voltage for the amplifier circuit using an operational amplifier circuit to maintain a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit further comprises generating the common mode voltage of the output signal using resistors coupled between first and second outputs of the amplifier circuit, wherein the supply voltage for the amplifier circuit is generated at load circuits that are coupled to the differential pair of transistors.

19. A method comprising:

generating an output signal based on an input signal using a differential pair of transistors in an amplifier circuit;

varying a gain of the output signal relative to the input signal in response to variations in a bias current through a variable current source circuit in the amplifier circuit; and

maintaining a common mode voltage of the output signal substantially constant in response to the variations in the bias current through the variable current source circuit by maintaining the common mode voltage of the output signal near a reference voltage using a feedback amplifier circuit.

20. The method of claim 16 further comprising:

generating a combined signal based at least in part on the output signal of the amplifier circuit using a combiner circuit; and

generating control signals for controlling the bias current through the variable current source circuit based on the combined signal using an adaptation circuit.

Assignments (4)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2025
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 072704/0307 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2024
From: ALTERA CORPORATION
To: INTEL CORPORATION
Reel/Frame 066055/0111 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2014
From: GIRIDHARAN, VISHAL
To: ALTERA CORPORATION
Reel/Frame 034131/0050 →