IP Library Granted Patent US 9,171,188
Granted Patent B2
US 9,171,188 · App. 14/540,319 · Granted Oct 27, 2015

Charge measurement

Inventor: Fredrik Larsen (Trondheim, NO)
Assignee: Atmel Corporation
G06G7/18G01R29/24G06F3/044G01R19/25
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,171,188
App. No.
14/540,319
Filed
Nov 13, 2014
Granted
Oct 27, 2015
Kind
B2
Art Unit
2842
USPC
327/336
Abstract

An apparatus comprises a comparator that includes a first input, a second input and an output. The comparator is configured for measuring a difference in voltage between a source coupled to the first input and another source coupled to the second input, and providing information associated with the measured difference at the output. The apparatus also comprises a controllable current source coupled to the first input of the comparator and configured for supplying or drawing current. The apparatus also comprises a digital logic circuit that is configured for controlling an amount of current supplied or drawn by the controllable current source. The apparatus is configured for measuring a charge associated with an external source that is coupled to the first input of the comparator.

Claims (68)

1. An apparatus comprising:

a comparator that includes a first input, a second input and an output, the comparator configured to measure a difference between a voltage associated with a first source coupled to the first input and a voltage associated with a second source coupled to the second input, wherein the voltage associated with the first source is indicative of a first amount of charge associated with the first source;

a controllable current source coupled to the comparator and configured to adjust an amount of current provided to the first source based on the measured difference; and

a digital logic circuit coupled to the comparator and to the controllable current source, the digital logic circuit configured to:

accumulate a value proportional to a second amount of charge based on the amount of the current provided by the controllable current source and an amount of time for which the current is provided by the controllable current source;

determine whether a threshold setting for the current provided by the controllable current source is reached; and

based on determining that the threshold setting is reached, output the accumulated value proportional to the second amount of charge as a measurement of the first amount of charge associated with the first source.

2. The apparatus of claim 1 , wherein the amount of current provided to the first source by the controllable current source includes current supplied or drawn by the controllable current source in successive steps, and wherein the digital logic circuit is configured to control at least one of the current supplied or drawn by the controllable current source in each step, or the amount of time for which the current is supplied or drawn in each step, such that the voltage associated with the first source at the first input of the comparator approaches the voltage associated with the second source coupled to the second input.

3. The apparatus of claim 1 , wherein the threshold setting includes one of a known limit on the amount of the current provided by the controllable current source in a step, or a known limit on the amount of time for which the current is provided by the controllable current source in a step.

4. The apparatus of claim 1 , wherein the comparator is configured to output information corresponding to the measured difference, and wherein the digital logic circuit comprises:

a delay circuit that is configured to provide a delayed version of the information output by the comparator;

an exclusive- or (XOR) circuit that is configured to provide an update signal based on the information output by the comparator and the delayed version provided by the delay circuit, wherein the update signal indicates when the voltage associated with the first source at the first input of the comparator crosses the voltage associated with the second source coupled to the second input based on the amount of current provided by the controllable current source;

a control circuit that is configured to:

receive the update signal, and

control the amount of current provided to the first source by the controllable current source based on the update signal; and

a digital accumulator that is configured to:

store the second amount of charge based on the amount of current provided to the first source by the controllable current source and the amount of time for which the current is provided, and

output the accumulated value proportional to the second amount of charge.

5. The apparatus of claim 4 , wherein the digital logic circuit further comprises a compensation circuit that is configured to:

adjust at least one of the amount of current provided to the first source by the controllable current source or the amount of time for which the current is provided based on a digital lookup table; and

provide information to the digital accumulator corresponding to the amount of current provided to the first source by the controllable current source and the amount of time for which the current is provided.

6. The apparatus of claim 4 , wherein the digital logic circuit further comprises a digital filter that is configured to filter the information output by the comparator, wherein the delayed version of the information provided by the delay circuit comprises a delayed version of the filtered information provided by the digital filter, and wherein the XOR circuit is configured to provide the update signal based on comparing the filtered information provided by the digital filter and the delayed version of the filtered information provided by the delay circuit.

7. The apparatus of claim 1 , wherein the apparatus is configured to perform one of integrating current or voltage, measuring capacitive sensors, measuring self-capacitance, or measuring mutual capacitance.

8. The apparatus of claim 1 , wherein the apparatus is associated with a capacitive touch screen display.

9. A system comprising:

a comparator that includes a first input, a second input and an output, the comparator configured to measure a difference between a voltage associated with a first source coupled to the first input and a voltage associated with a second source coupled to the second input, wherein the voltage associated with the first source is indicative of a first amount of charge associated with the first source;

a controllable current source configured to adjust an amount of current provided to the first source based on the measured difference; and

a digital logic circuit configured to:

accumulate a value proportional to a second amount of charge based on the amount of the current provided by the controllable current source and an amount of time for which the current is provided by the controllable current source;

determine whether a threshold setting for the current provided by the controllable current source is reached; and

based on determining that the threshold setting is reached, output the accumulated value proportional to the second amount of charge as a measurement of the first amount of charge associated with the first source.

10. The system of claim 9 , wherein the amount of current provided to the first source by the controllable current source includes current supplied or drawn by the controllable current source in successive steps, and wherein the digital logic circuit is configured to control at least one of the current supplied or drawn by the controllable current source in each step, or the amount of time for which the current is supplied or drawn in each step, such that the voltage associated with the first source at the first input of the comparator approaches the voltage associated with the second source coupled to the second input.

11. The system of claim 10 , wherein the threshold setting includes one of a known limit on the amount of the current provided by the controllable current source in a step, or a known limit on the amount of time for which the current is provided by the controllable current source in a step.

12. The system of claim 9 , wherein the comparator is configured to output information corresponding to the measured difference, and wherein the digital logic circuit comprises:

a delay circuit that is configured to provide a delayed version of the information output by the comparator;

an exclusive- or (XOR) circuit that is configured to provide an update signal based on the information output by the comparator and the delayed version provided by the delay circuit, wherein the update signal indicates when the voltage associated with the first source at the first input of the comparator crosses the voltage associated with the second source coupled to the second input based on the amount of current provided by the controllable current source;

a control circuit that is configured to:

receive the update signal, and

control the amount of current provided to the first source by the controllable current source based on the update signal; and

a digital accumulator that is configured to:

store the second amount of charge based on the amount of current provided to the first source by the controllable current source and the amount of time for which the current is provided, and

output the accumulated value proportional to the second amount of charge.

13. The system of claim 12 , wherein the digital logic circuit further comprises a compensation circuit that is configured to:

adjust at least one of the amount of current provided to the first source by the controllable current source or the amount of time for which the current is provided based on a digital lookup table; and

provide information to the digital accumulator corresponding to the amount of current provided to the first source by the controllable current source and the amount of time for which the current is provided.

14. The system of claim 12 , wherein the digital logic circuit further comprises a digital filter that is configured to filter the information output by the comparator, wherein the delayed version of the information provided by the delay circuit comprises a delayed version of the filtered information provided by the digital filter, and wherein the XOR circuit is configured to provide the update signal based on comparing the filtered version of the information provided by the digital filter and the delayed version of the filtered information provided by the delay circuit.

15. A method comprising:

measuring a difference between a voltage associated with a first source coupled to a first input of a comparator and a voltage associated with a second source coupled to a second input of the comparator, wherein the voltage associated with the first source is indicative of a first amount of charge associated with the first source;

based on measuring the difference, adjusting an amount of current provided by a controllable current source to the first source;

accumulating a value proportional to a second amount of charge based on the amount of current provided by the controllable current source and an amount of time for which the current is provided by the controllable current source;

determining whether a threshold setting for the current provided by the controllable current source is reached; and

based on determining that the threshold setting is reached, outputting the accumulated value proportional to the second amount of charge as a measurement of the first amount of charge associated with the first source.

16. The method of claim 15 , wherein adjusting the amount of the current provided by the controllable current source to the first source comprises supplying or drawing current provided by the controllable current source in successive steps, the method further comprising:

controlling at least one of the current supplied or drawn by the controllable current source in each step, or the amount of time for which the current is supplied or drawn in each step, such that the voltage associated with the first source at the first input of the comparator approaches the voltage associated with the second source coupled to the second input.

17. The method of claim 16 , wherein determining whether the threshold setting for the current is reached comprises one of:

determining whether the amount of the current provided by the controllable current source in a step is equal to a known limit on the amount of the current, or determining whether the amount of time for which the current is provided by the controllable current source in a step is equal to a known limit on the amount of time.

18. The method of claim 15 , wherein measuring the difference between the voltage associated with the first source and the voltage associated with the second source comprises outputting information corresponding to the measured difference by the comparator, the method further comprising:

providing a delayed version of the information output by the comparator;

generating an update signal based on the information output by the comparator and the delayed version of the information, wherein the update signal indicates when the voltage associated with the first source at the first input of the comparator crosses the voltage associated with the second source coupled to the second input based on the amount of current provided by the controllable current source;

controlling the amount of current provided to the first source by the controllable current source based on the update signal;

storing the second amount of charge based on the amount of current provided to the first source by the controllable current source and the amount of time for which the current is provided; and

outputting the accumulated value proportional to the second amount of charge.

19. The method of claim 18 , further comprising:

adjusting at least one of the amount of current provided to the first source by the controllable current source or the amount of time for which the current is provided based on a digital lookup table.

20. The method of claim 18 , wherein generating the update signal further comprises:

filtering the information output by the comparator;

providing a delayed version of the filtered information; and

generating the update signal based on comparing the filtered information and the delayed version of the filtered information.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2019
From: MICROCHIP TECHNOLOGY INC.; ATMEL CORPORATION; MICROCHIP TECHNOLOGY GERMANY GMBH
To: NEODRÓN LIMITED
Reel/Frame 048259/0840 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0884 →
RELEASE OF SECURITY INTEREST IN CERTAIN PATENT RIGHTS Recorded Dec 21, 2018
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; ATMEL CORPORATION
Reel/Frame 047976/0937 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038375/0234 →
PATENT SECURITY AGREEMENT Recorded Jun 16, 2015
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC., AS ADMINISTRATIVE AGENT, ISSUING BANK AND SWINGLINE LENDER
Reel/Frame 035918/0451 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2014
From: LARSEN, FREDRIK
To: ATMEL CORPORATION
Reel/Frame 034555/0242 →
Continuity (3)
Continuation 14272648 · May 8, 2014
Continuation 13667171 · Nov 2, 2012
Related Publication 20150070313A1 · Mar 12, 2015