Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.
1. A stacked system of microelectronic devices, comprising:
a first microelectronic device having a first bottom side and first metal leads coupled to the first bottom side, wherein a first dielectric casing defines at least a portion of the first bottom side;
a second microelectronic device having a top side, a lateral side, a second bottom side, a second bottom side bond-site, and second metal leads coupled to the second bottom side, the second leads including a lateral portion that laterally projects away from the lateral side, a tiered portion that laterally projects towards the lateral side, and an angled portion between the lateral portion and the tiered portion that positions the tiered portion above the lateral portion, wherein a second dielectric casing defines at least a portion of the top side;
an adhesive layer positioned between the top side of the second microelectronic device and the bottom side of the first microelectronic;
metal solder bumps between individual first leads and individual tiered portions of the second leads;
a support substrate adjacent to and spaced apart from the second bottom side, the support substrate having a substrate bond-site; and
a substrate connector attached to the substrate bond-site and to the second bottom side bond-site.
2. The stacked system of claim 1 wherein the metal solder bumps are further attached to the individual second leads of the second microelectronic device at a surface of the angled portion that generally faces away from the lateral side of the second casing.
3. The stacked system of claim 1 wherein the tiered portion is separated from a corresponding first lead by a vertical distance of up to 60 microns.
4. The stacked system of claim 1 wherein the angled portion is substantially perpendicular to the lateral portion.
5. The stacked system of claim 1 wherein the angled portion is substantially perpendicular to the tiered portion.
6. The stacked system of claim 1 wherein the first dielectric casing has a first lateral dimension substantially equal to a second lateral dimension of the second dielectric casing.
7. The stacked system of claim 1 wherein the second microelectronic device has a redistribution structure at the second bottom side.
8. The stacked system of claim 7 wherein the redistribution structure includes layered metal traces.
9. A stacked system of microelectronic devices, comprising:
a first microelectronic device having a first die, a first bottom side, and first metal leads coupled to the first bottom side, wherein the first die has a first lateral dimension;
a second microelectronic device having a second die, a top side, a lateral side, a second bottom side, a second bottom side bond-site, and second metal leads coupled to the second bottom side, the second leads including a lateral portion that laterally projects away from the lateral side, a tiered portion that laterally projects towards the lateral side, and an angled portion between the lateral portion and the tiered portion that positions the tiered portion above the lateral portion, wherein the second die has a second lateral dimension;
metal solder bumps between individual first leads and individual tiered portions of the second leads;
a support substrate adjacent to and spaced apart from the second bottom side, the support substrate having a substrate bond-site; and
a substrate connector attached to the substrate bond-site and to the second bottom side bond-site.
10. The stacked system of claim 9 wherein a first dielectric casing defines at least a portion of the first bottom side, and wherein a second dielectric casing defines at least a portion of the top side, and wherein the first and second dielectric casings have substantially equal lateral dimensions.
11. The stacked system of claim 9 further comprising an adhesive layer positioned between the top side of the second microelectronic device and the bottom side of the first microelectronic.
12. The stacked system of claim 9 wherein the metal solder bumps are further attached to the individual second leads of the second microelectronic device at a surface of the angled portion that generally faces away from the lateral side of the second casing.
13. The stacked system of claim 9 wherein the tiered portion is separated from a corresponding first lead by a vertical distance of up to 60 microns.
14. The stacked system of claim 9 wherein the angled portion is substantially perpendicular to the lateral portion.
15. The stacked system of claim 9 wherein the angled portion is substantially perpendicular to the tiered portion.
16. The stacked system of claim 9 wherein the second microelectronic device has a redistribution structure at the second bottom side.
17. The stacked system of claim 9 wherein the redistribution structure includes layered metal traces.
18. A stacked system of microelectronic devices, comprising:
a first microelectronic device having a first die, a first bottom side, and first metal leads coupled to the first bottom side, wherein the first die has a first lateral dimension;
a second microelectronic device having a second die, a top side, a lateral side, a second bottom side, a second bottom side bond-site, and second metal leads coupled to the second bottom side, the second leads including a lateral portion that laterally projects away from the lateral side, a tiered portion that laterally projects towards the lateral side, and an angled portion between the lateral portion and the tiered portion that positions the tiered portion above the lateral portion, wherein the second die has a second lateral dimension;
metal solder bumps between individual first leads and individual tiered portions of the second leads;
a support substrate adjacent to and spaced apart from the second bottom side, the support substrate having a substrate bond-site; and
a substrate connector attached to the substrate bond-site and to the second bottom side bond-site;
wherein a first dielectric casing defines at least a portion of the first bottom side, and wherein a second dielectric casing defines at least a portion of the top side, and wherein the first and second dielectric casings have substantially equal lateral dimensions.