Granted Patent B2

US 9,972,750 · App. 14/566,317 · Granted May 15, 2018

Abstract

Claims (69)

1. A method of fabricating a light emitting diode (LED) device, comprising:

forming a layer of a transparent, electrically conductive material over at least a portion of a non-planar surface of the LED device;

depositing a layer of a dielectric material over, and directly on a top surface of at least a portion of the layer of the transparent, electrically conductive material, wherein the layer of the dielectric material has a transmissivity greater than 85% for at least one emission wavelength of the LED device; and

forming a metal contact directly on a top surface of the layer of the transparent, electrically conductive material layer, wherein the metal contact physically contacts a portion of a top surface of the layer of the dielectric material,

wherein depositing the layer of dielectric material comprises at least one of:

(a) depositing the layer using a chemical vapor deposition (CVD) process;

(b) depositing the layer at a temperature of 200° C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material,

wherein the dielectric material layer decreases a resistivity of the layer of transparent, electrically conductive material to a value that is 50% or less than the resistivity of the layer of transparent, electrically conductive material in the device without the dielectric material layer.

2. The method of claim 1 , wherein depositing the layer of dielectric material comprises depositing the layer at a temperature of 200° C. to 600° C.

3. The method of claim 1 , further comprising:

forming a plurality of first conductivity type semiconductor nanowire cores located over a support; and

forming a plurality of second conductivity type semiconductor shells extending over and around the respective nanowire cores to form the LED device having a non-planar surface, wherein the layer of transparent conductive material is formed over the plurality of second conductivity type semiconductor shells.

4. The method of claim 1 , wherein the layer of transparent, electrically conductive material comprises a transparent conductive oxide (TCO).

5. The method of claim 1 , wherein the dielectric material comprises at least one of SiO 2 , SiN and Al 2 O 3 .

6. The method of claim 1 , wherein the layer of the dielectric material has an optical transmissivity greater than 90% for at least one emission wavelength of the LED device.

7. The method of claim 1 , wherein depositing the layer of dielectric material comprises at least two of:

(a) depositing the layer using the chemical vapor deposition (CVD) process;

(b) depositing the layer at the temperature of 200° C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material.

8. The method of claim 1 , wherein depositing the layer of dielectric material comprises all three of:

(a) depositing the layer using the chemical vapor deposition (CVD) process;

(b) depositing the layer at the temperature of 200° C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material.

9. A method of fabricating a semiconductor device, comprising:

forming a layer of a transparent, electrically conductive material over at least a portion of the semiconductor device;

depositing a layer of a dielectric material over, and directly on a top surface of at least a portion of the layer of the transparent, electrically conductive material, wherein the layer of the dielectric material has a transmissivity greater than 85% for at least one emission wavelength of the LED device; and

forming a metal contact directly on a top surface of the layer of the transparent, electrically conductive material layer, wherein the metal contact physically contacts a portion of a top surface of the layer of the dielectric material,

wherein depositing the layer of dielectric material comprises at least one of:

(a) depositing the layer using a chemical vapor deposition (CVD) process;

(b) depositing the layer at a temperature of 200° C. or more; and

(c) depositing the layer using one or more chemically active precursors for the dielectric material; and

wherein the dielectric material decreases a resistivity of the transparent, electrically conductive material to a value that is 50% or less of the resistivity of the transparent, electrically conductive material in the device without the dielectric material layer.

10. The method of claim 9 , wherein the layer of the dielectric material comprises a single SiO 2 layer which contacts the layer of transparent conductive material and the metal contact physically contacts the portion of the top surface of the single SiO 2 layer.

11. The method of claim 10 , wherein the dielectric material decreases the resistivity of the transparent, electrically conductive material by optimizing a concentration of vacancies in the transparent, electrically conductive material.

12. The method of claim 1 , wherein the layer of the dielectric material comprises a single SiO 2 layer which contacts the layer of transparent conductive material and the metal contact physically contacts the portion of the top surface of the single SiO 2 layer.

13. The method of claim 12 , wherein the dielectric material decreases the resistivity of the transparent, electrically conductive material by optimizing a concentration of vacancies in the transparent, electrically conductive material.

14. The method of claim 1 , further comprising:

forming a photoresist layer directly on a top surface of the layer of the dielectric material;

forming an opening through the layer of the dielectric material and through the photoresist layer, wherein the top surface of the layer of the transparent, electrically conductive material layer is physically exposed at a bottom of the opening;

depositing a metal inside the opening and over the photoresist layer; and

lifting off the photoresist layer, wherein a remaining portion of the deposited metal constitutes the metal contact.

15. The method of claim 1 , wherein:

the LED device is formed on a buffer layer on a semiconductor substrate; and

the LED device comprises a plurality of nanowires.

16. The method of claim 12 , wherein:

the transparent, electrically conductive material comprises an indium tin oxide layer;

the single SiO 2 layer is deposited by the CVD process at a temperature of 200° C. to 600° C. using SiH 4 and O 2 chemically active precursors at a pressure of 25 Torr or less; and

the single SiO 2 layer decreases the resistivity of the indium tin oxide layer by optimizing a concentration of vacancies in the indium tin oxide layer.

17. The method of claim 1 , wherein:

the metal contact is formed after formation of the layer of the dielectric material; and

a portion of the dielectric material is removed to form the opening within the layer of the dielectric material; and

the metal contact is deposited directly on the entire sidewall of the opening within the layer of the dielectric material.

18. The method of claim 9 , further comprising:

forming a photoresist layer directly on a top surface of the layer of the dielectric material;

forming an opening through the layer of the dielectric material and through the photoresist layer, wherein the top surface of the layer of the transparent, electrically conductive material layer is physically exposed at a bottom of the opening;

depositing a metal inside the opening and over the photoresist layer; and

lifting off the photoresist layer, wherein a remaining portion of the deposited metal constitutes the metal contact.

19. The method of claim 9 , wherein:

the LED device is formed on a buffer layer on a semiconductor substrate; and

the LED device comprises a plurality of nanowires.

20. The method of claim 10 , wherein:

the transparent, electrically conductive material comprises an indium tin oxide layer;

the single SiO 2 layer is deposited by the CVD process at a temperature of 200° C. to 600° C. using SiH 4 and O 2 chemically active precursors at a pressure of 25 Torr or less; and

the single SiO 2 layer decreases the resistivity of the indium tin oxide layer by optimizing a concentration of vacancies in the indium tin oxide layer.

21. The method of claim 9 , wherein:

the metal contact is formed after formation of the layer of the dielectric material; and

a portion of the dielectric material is removed to form the opening within the layer of the dielectric material; and

the metal contact is deposited directly on the entire sidewall of the opening within the layer of the dielectric material.

Assignments (10)