METHOD AND COMPUTER SYSTEM FOR SIMULATING OPERATION OF A PROGRAMMABLE INTEGRATED CIRCUIT
In a method of simulating operation of a programmable integrated circuit, a computer is operated to execute simultaneously a functional model and a timing model of the integrated circuit. Executing the functional model comprises: determining a transaction sequence which comprises one or more successive transactions of the integrated circuit and, for each transaction of said transaction sequence, updating a state of the integrated circuit in dependence of the respective transaction. Executing the timing model comprises: determining, for each of said transactions, a corresponding latency. A data carrier carrying executable instructions for instructing a computer to carry out the method and a computer system are proposed as well.
1 . A method of simulating operation of a programmable integrated circuit, comprising:
operating a computer to execute simultaneously a functional model and a timing model of the integrated circuit;
wherein the act of executing the functional model comprises:
determining a transaction sequence which comprises one or more successive transactions of the integrated circuit and, for each transaction of said transaction sequence, updating a state of the integrated circuit in dependence of the respective transaction;
and wherein the act of executing the timing model comprises:
determining, for each of said transactions, a corresponding latency.
2 . The method of claim 1 , wherein said act of executing the functional model comprises:
generating a new transaction of said sequence of transactions in dependence of a current state of said integrated circuit.
3 . The method of claim 1 , wherein said act of executing the functional model comprises:
generating a new transaction of said transaction sequence in dependence of a current state of the integrated circuit and an input event. .
4 . The method of claim 1 , comprising:
maintaining and updating a list representing said transaction sequence.
5 . The method of claim 1 , wherein executing the timing model comprises, for each of said transactions:
queuing the respective transaction in a transaction queue buffer.
6 . The method of claim 5 , comprising:
suspending execution of the functional model in response to detecting that said transaction queue buffer is full.
7 . The method of claim 1 , wherein said act of determining a corresponding latency is performed on the basis of a set of latency rules.
8 . A data carrier carrying executable instructions for instructing a computer to carry out the method of claim 1 .
9 . A computer system arranged to carry out the method of claim 1 .