Self-cascadable phase shifter
View Patent ↗A self-cascadable phase shifter having a two corresponding pairs of input and output pins. Each pair of input and output pins are interconnected by phase delay circuitry that is isolated from phase delay circuitry interconnecting the other pair of input and output pins so that each pair of input and output pins produces, for example, a 90 degree phase shift. The resulting phase shifter can be used to produce a 90 degree by using one pair of input and output pins or cascading both pairs of input and output pins to provide a 180 degree delay.
1. A phase shifter comprising:
a body supporting a pair of opposing ground pads, a first input, a first output, a second input and a second output;
first phase delay circuitry positioned in the body and electrically interconnecting the first input with the first output to produce a first predetermined phase delay in a signal provided to the first input; and
second phase delay circuitry positioned in the body and electrically interconnecting the second input with the second output to produce a second predetermined phase delay in a signal provided to the second input;
wherein an electrical connection between the first output and the second input will produce a third predetermined phase delay in a signal that is the sum of the first predetermined phase delay and the second predetermined phase delay.
2. The phase shifter of claim 1 , wherein the first predetermined phase delay is 90 degrees.
3. The phase shifter of claim 2 , wherein the second predetermined phase delay is 90 degrees.
4. The phase shifter of claim 3 , wherein the first phase delay circuitry is formed on a first layer of the body and the second phase delay circuity is formed on a second layer of the body.
5. The phase shifter of claim 4 , wherein the first and second layers of the body are separated by a third layer.
6. The phase shifter of claim 5 , wherein the third layer comprises a dielectric.
7. A method of using a phase shifter, comprising the steps of:
providing a body supporting a pair of opposing ground pads, a first input, a first output, a second input and a second output and having first phase delay circuitry electrically interconnecting the first input with the first output to produce a first predetermined phase delay in a signal provided to the first input and second phase delay circuitry electrically interconnecting the second input with the second output to produce a second predetermined phase delay in a signal provided to the second input, wherein an electrical connection between the first output and the second input will produce a third predetermined phase delay in a signal that is the sum of the first predetermined phase delay and the second predetermined phase delay;
connecting the first output to the second input; and
providing a signal to the first input and receiving a phase shifted signal at the second output.
8. The method claim 7 , wherein the first phase delay circuit provides a first predetermined phase delay and the second phase delay circuit provides a second predetermined phase delay.
9. The method of claim 8 , wherein the first predetermined phase delay is 90 degrees.
10. The method of claim 9 , wherein the second predetermined phase delay is 90 degrees.
11. The method of claim 10 , wherein the first phase delay circuitry is formed on a first layer of the body and the second phase delay circuity is formed on a second layer of the body.
12. The method of claim 10 , wherein the first and second layers of the body are separated by a third layer.
13. The method of claim 12 , wherein the third layer of the body comprises a dielectric.