Patent Assignment
Reel/Frame 075679/0852
Release of Security Interest in Patents Previously Recorded at Reel/Frame (063804/0702)
Recorded: 2026-06-02
Pages: 20
Assignor
JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Executed: 2026-06-01
Assignees
TELEPHONICS CORPORATION
200 E. SANDPOINTE AVE, SUITE 400, SANTA ANA, CALIFORNIA, 92707
TTM TECHNOLOGIES, INC.
200 E. SANDPOINTE AVE, SUITE 400, SANTA ANA, CALIFORNIA, 92707
TTM TECHNOLOGIES NORTH AMERICA, LLC
200 E. SANDPOINTE AVE, SUITE 400, SANTA ANA, CALIFORNIA, 92707
Covered Properties
(149)
Gps Denial Detection and Reporting and Mitigation
Patent:
11,698,461 →
Application:
17/121,853 →
AESA True Dual Beam Full Range, Full Doppler Spectrum Imaging While Scanning Radar System
Patent:
12,523,756 →
Application:
17/543,891 →
Systems and Methods for Removing Undesired Metal Within Vias from Printed Circuit Boards
Application:
17/511,333 →
Publication:
US US20220053641A1
Forming Waveguides and Heat Transfer Elements in Printed Circuit Boards
Application:
17/939,786 →
Publication:
US US20230082429A1
High-Density Optical Waveguide Structure and Printed Circuit Board and Preparation Method Thereof
Systems and Methods for Removing Undesired Metal Within Vias from Printed Circuit Boards
Method of Manufacturing Printed Circuit Board Assemblies with Engineered Thermal Paths
Vacuum Nozzle Assembly for Vacuum-Assisted Driver
Application:
17/191,480 →
Publication:
US US20210276167A1
Methods for Fabricating Printed Circuit Board Assemblies with High Density via Array
Application:
17/225,491 →
Publication:
US US20210227695A1
Methods for Forming Engineered Thermal Paths of Printed Circuit Boards by Use of Removable Layers
Circulator Design and Methods of Fabricating the Circulator
High Powered Rf Part for Improved Manufacturability
High Powered Rf Part for Improved Manufacturability
Application:
17/725,371 →
Publication:
US US20220247058A1
Near-Hermetic Package with Flexible Signal Input and Output
System and Methods for Passive Alignments of Light Transmitting or Receiving Devices to Planar Waveguides
Application:
63/449,520 →
Shielded Signal Vias in Printed Circuit Boards for High-Frequency and Broadband Signals
Application:
18/121,355 →
Publication:
US US20230292431A1
Folded Circulator Device with Coupling Elements and Flex Connections for Interconnect and Methods of Fabricating the Circulator Device
Application:
63/452,736 →
Systems and Methods for Baluns Optimized for Wideband Balanced Properties
Application:
63/476,539 →
Fast Switching, Ultra-Low Power and Compact Varactor Driver
Application:
63/460,554 →
Compact Radar with X Band Long-Distance Weather Monitoring & W Band High-Resolution Obstacle Imaging for Landing in a Degraded Visual Environment
Patent:
11,493,622 →
Application:
16/270,046 →
Dual Channel Spatially Adaptive Cfar
A Method for Detecting a Target
System and Method for Suppressing Iff Responses in the Sidelobes and Backlobes of Iff Interrogator Antennas
Step Frequency High Resolution Radar
Bidirectional Integrated Cmos Switch
Bidirectional Integrated Cmos Switch
System and Method for Providing Accurate Position Location Information to Military Forces in a Disadvantaged Signal Environment
Patent:
10,591,609 →
Application:
15/866,849 →
Air-Cooled Heat Exchanger and Thermal Arrangement for Stacked Electronics
Patent:
10,757,809 →
Application:
16/203,999 →
Air-Cooled Heat Exchanger and Thermal Arrangement for Stacked Electronics
System and Method for Providing Accurate Position Location Information to Military Forces in a Disadvantaged Signal Environment
Monopulse Secondary Surveillance Radar System
Patent:
11,320,528 →
Application:
17/088,768 →
Method of Fabricating a Printed Circuit Board Interconnect Assembly
Circulator and Method of Manufacture
Non-Switching Adaptable 4-Way Power Splitter/Combiner
Auxiliary Amplifier Network
Inverted Style Balun with Dc Isolated Differential Ports
Vertical Inter-Digital Coupler
Surface Mount Stripline Devices Having Ceramic and Soft Board Hybrid Materials
Coupler Device
Patent:
8,044,749 →
Application:
12/392,649 →
Surface Mountable Circulator
Magnetic Instrument Pickup
Compact Balun
Wideband Balun Using Re-Entrant Coupled Lines and Ferrite Material
Impedance Transforming Coupler
Wideband Doherty Amplifier Network
High Power RF Circuit
Patent:
8,969,733 →
Application:
14/041,155 →
Compact Broadband Impedance Transformer
Rf Resistor with Lossy Traces
First and Second Microstrip Networks Stacked in an Inverted Arrangement to Each Other Using an Integrated Support and Shielding Structure
Doherty Power Amplifier Network
Hybrid Coupler Device Having Plural Transmission Line Structures with Unwound-Rewound Geometry
Stress Relieved High Power Rf Circuit
Self-Cascadable Phase Shifter
Wideband Rf Device
Rf Attenuator Device and System
Rf Termination
Tube Fitting
Differential Assembly with Clutch
Classifying collision events using inertial and audio data
Circulator with Modified Bias to Prevent Higher Order Modes
Wideband Gysel Power Divider
Impedance Matching Component
High Powered Rf Part for Improved Manufacturability
Wideband Termination for High Power Applications
Patent:
10,772,193 →
Application:
16/705,703 →
Methods for Fabricating Printed Circuit Board Assemblies with High Density via Array
Three-Dimensional Circuit Assembly with Composite Bonded Encapsulation
Directional Couplers with Dc Insulated Input and Output Ports
Wideband Termination for High Power Applications
Fiber Optic Circuit Board Connector
Pcb Embedded and Surface Mounted Optical Distribution Systems
Bending an Optical Fiber into a Backplane
Bending an Optical Fiber into Backplane
System and Method for Electrolytic Plating
System and Method for Integrating Optical Layers in a Pcb for Inter-Board Communications
System for Cleaning Components for Filling Holes in a Printed Circuit Board with a Fluid Fill Material
Method for Analyzing Material Density Variations on a Multi-Layer Printed Circuit Board
Circuit Board Multi-Functional Hole System and Method
Fiber Optic Circuit Connector
Circuitized Substrate Assembly and Method of Making Same
Electronic Package with Strengthened Conductive Pad
Information Handling System Utilizing Circuitized Substrate
Stacked Chip Electronic Package Having Laminate Carrier and Method of Making Same
Capacitor Material with Metal Component for Use in Circuitized Substrates, Circuitized Substrate Utilizing Same, Method of Making Said Circuitized Substrate, and Information Handling System Utilizing Said Circuitized Substrate
Patent:
7,025,607 →
Application:
11/031,074 →
Pinned Electronic Package with Strengthened Conductive Pad
Circuitized Substrate
Electronic Component Test Apparatus
Low Moisture Absorptive Circuitized Substrate, Method of Making Same, Electrical Assembly Utilizing Same, and Information Handling System Utilizing Same
Circuitized Substrate with Split Conductive Layer, Method of Making Same, Electrical Assembly Utilizing Same, and Information Handling System Utilizing Same
Stacked Chip Electronic Package Having Laminate Carrier and Method of Making Same
Circuitized Substrate with Signal Wire Shielding, Electrical Assembly Utilizing Same and Method of Making
Method and Apparatus for Depositing Conductive Paste in Circuitized Substrate Openings
Dielectric Composition for Forming Dielectric Layer for Use in Circuitized Substrates
Interposer for Use with Test Apparatus
Method of Treating Conductive Layer for Use in a Circuitized Substrate and Method of Making Said Substrate Having Said Conductive Layer as Part Thereof
Method of Making Multilayered Circuitized Substrate Assembly Having Sintered Paste Connections
Circuitized Substrate with Sintered Paste Connections, Multilayered Substrate Assembly, Electrical Assembly and Information Handling System Utilizing Same
Method of Making Circuitized Substrate Assembly
Method of Making Circuitized Substrate
Circuitized Substrate with Soler-Coated Microparticle Paste Connections, Multilayered Substrate Assembly, Electrical Assembly and Information Handling System Utilizing Same and Method of Making Said Substrate
Low Moisture Absorptive Circuitized Substrate with Reduced Thermal Expansion, Method of Making Same, Electrical Assembly Utilizing Same, and Information Handling System Utilizing Same
Information Handling System Including a Circuitized Substrate Having a Dielectric Layer Without Continuous Fibers
Method of Making an Interposer
Methods of Manufacturing Printed Circuit Boards with Stacked Micro Vias
Method of Making Circuitized Substrate with Solder Paste Connections
Method of Making a Circuitized Substrate with Enhanced Circuitry and Electrical Assembly Utilizing Said Substrate
Method of Providing a Printed Circuit Board with an Edge Connection Portion and/or a Plurality of Cavities Therein
Multilayered Circuitized Substrate with P-Aramid Dielectric Layers and Method of Making Same
Method of Making a Multi-Chip Electronic Package Having Laminate Carrier
Circuitized Substrate with Shielded Signal Lines and Plated-Thru-Holes and Method of Making Same, and Electrical Assembly and Information Handling System Utilizing Same
Method of Providing a Printed Circuit Board with an Edge Connection Portion
Circuitized Substrate with Internal Cooling Structure and Electrical Assembly Utilizing Same
Multi-Layer Embedded Capacitance and Resistance Substrate Core
Capacitive Substrate and Method of Making Same
Methods of Manufacturing Printed Circuit Boards with Stacked Micro Vias
High Speed Interposer
Methods of Manufacturing Printed Circuit Boards
Patent:
8,020,292 →
Application:
12/772,086 →
Method of Manufacturing a Multilayer Printed Wiring Board with Copper Wrap Plated Hole
Power Core for Use in Circuitized Substrate and Method of Making Same
A Method of Joining a Semiconductor Device/Chip to a Printed Wiring Board
Method of Making High Density Interposer and Electronic Package Utilizing Same
Method of Manufacturing a Printed Circuit Board
Circuitized substrate with dielectric layer having dielectric composition not including continuous or semi-continuous fibers
Manufacturing Methods of Multilayer Printed Circuit Board Having Stacked Via
Method of Making Halogen-Free Circuitized Substrate with Reduced Thermal Expansion
Methods of Manufacturing a Printed Wiring Board Having Copper Wrap Plated Hole
Coreless Layer Buildup Structure with Lga
Methods of Manufacturing Printed Circuit Boards
Methods of Manufacturing Printed Circuit Boards Using Parallel Processes to Interconnect with Subassemblies
Methods of Manufacturing Printed Circuit Boards with Stacked Micro Vias
Printed Circuit Board with Embedded Heater
Methods of Manufacturing Printed Circuit Boards with Stacked Micro Vias
Method of Making a Circuitized Substrate
Method for Anchoring a Conductive Cap on a Filled via in a Printed Circuit Board and Printed Circuit Board with an Anchored Conductive Cap
Method of Making a Circuitized Substrate Having a Plurality of Solder Connection Sites Thereon
Substrate Test Apparatus and Method of Testing Substrates
Patent:
7,129,732 →
Application:
11/281,456 →
Circuitized Substrate with Filled Isolation Border, Method of Making Same, Electrical Assembly Utilizing Same, and Information Handling System Utilizing Same
Printed Circuit Board with Low Cross-Talk Noise
Method of making multilayered printed circuit board with filled conductive holes
Method of Making Same Low Moisture Absorptive Circuitized Substrave with Reduced Thermal Expansion
Halogen-Free Circuitized Substrate with Reduced Thermal Expansion, Method of Making Same, Multilayered Substrate Structure Utilizing Same, and Information Handling System Utilizing
Circuitized Substrate with Internal Stacked Semiconductor Chips, Method of Making Same, Electrical Assembly Utilizing Same and Information Handling System Utilizing Same
Circuitized Substrate with Conductive Paste, Electrical Assembly Including Said Circuitized Substrate and Method of Making Said Substrate
Circuitized Substrate with Continuous Thermoplastic Support Film Dielectric Layers
Multi-Layer Embedded Capacitance and Resistance Substrate Core
Information Handling System Utilizing Circuitized Substrate
Circuitized Substrate Assembly and Method of Making Same
Method of Providing Printed Circuit Board with Conductive Holes and Board Resulting Therefrom
Method of Making Circuitized Substrate with Internal Optical Pathway
Systems and Methods of Manufacturing Printed Circuit Boards Using Blind and Internal Micro Vias to Couple Subassemblies
Related Assignments
(25)
Other recorded transfers of the patents in this record — the chain of ownership.
Notice of Succession of Agency
Feb 25, 2019
From: JPMORGAN CHASE BANK, N.A.
To: BANK OF AMERICA, N.A.
Reel/Frame 048429/0264 →
Assignment of Assignor's Interest
May 14, 2019
From: PIERRO, JOHN; RESNICK, SETH; KRABAK, RICHARD
To: TELEPHONICS CORPORATION
Reel/Frame 049165/0551 →
Security Agreement
Jan 30, 2020
From: CLOPAY CORPORATION; THE AMES COMPANIES, INC.; ATT SOUTHERN LLC; CORNELLCOOKSON, LLC
To: BANK OF AMERICA, N.A.
Reel/Frame 051759/0652 →
Assignment of Assignor's Interest
Nov 11, 2020
From: LEHRER, MACE; MCKAY, JAMES; BLESSING, CHARLES
To: TTM TECHNOLOGIES INC.
Reel/Frame 054340/0354 →
Assignment of Assignor's Interest
Feb 16, 2021
From: SHI, XINHONG; FU, HAITAO; ZHANG, JUN; ZHOU, HUAMEI
To: TTM TECHNOLOGIES INC.
Reel/Frame 055276/0703 →
Assignment of Assignor's Interest
Mar 17, 2021
From: O'CONNOR, JOHN
To: TTM TECHNOLOGIES INC.
Reel/Frame 055628/0954 →
Assignment of Assignor's Interest
Mar 17, 2021
From: MESSINA, FRANK D.; STEIN, MICHAEL
To: TELEPHONICS CORPORATION
Reel/Frame 055614/0078 →
Assignment of Assignor's Interest
Apr 15, 2021
From: LEN, MICHAEL; MEI, CHONG; LUGERT, MICHAEL; KUMAR, RAJ
To: TTM TECHNOLOGIES INC.
Reel/Frame 055929/0308 →
Assignment of Assignor's Interest
Jun 23, 2021
From: ANAREN, INC.
To: TTM TECHNOLOGIES INC.
Reel/Frame 056635/0640 →
Assignment of Assignor's Interest
Oct 13, 2021
From: BAUER, RICK; MARTINSON, JERRAD; HOFFSTATTER, SHANE; LAUDAL, DOYLE
To: ANAREN, INC.
Reel/Frame 057783/0550 →
Assignment of Assignor's Interest
Nov 18, 2021
From: NEELY, MATTHEW DOUGLAS; KONRAD, JOHN; LEHRER, MACE
To: TTM TECHNOLOGIES INC.
Reel/Frame 058156/0751 →
Assignment of Assignor's Interest
Jan 13, 2022
From: ONORATO, JAMES; LO MONTE, LORENZO; MALONEY-HAHN, JUSTIN
To: TELEPHONICS CORPORATION
Reel/Frame 058639/0843 →
Assignment of Assignor's Interest
Feb 28, 2022
From: NEELY, MATTHEW D.; LEN, MICHAEL; LEUNG, KING YIP
To: TTM TECHNOLOGIES INC.
Reel/Frame 059115/0320 →
Corrective Assignment to Correct the Receiving Party Name Previously Recorded at Reel: 017273 Frame: 0805. Assignor(S) Hereby Confirms the Assignment.
Apr 12, 2022
From: WAHL, ROBERT
To: TELEPHONICS CORPORATION
Reel/Frame 059616/0500 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 023231 Frame: 0389. Assignor(S) Hereby Confirms the Assignment .
Apr 12, 2022
From: BLUMLING, JAMES P.
To: TELEPHONICS CORPORATION
Reel/Frame 059965/0865 →
Partial Release of Security Interest
Jun 27, 2022
From: BANK OF AMERICA, N.A.
To: TELEPHONICS CORPORATION
Reel/Frame 060443/0941 →
Corrective Assignment to Correct the Patent Numbers 10849228 and 11280914 Which Were Mistakenly Input as Application Numbers. Previously Recorded on Reel 060443 Frame 0941. Assignor(S) Hereby Confirms the Partial Release of Security Interest.
Aug 2, 2022
From: BANK OF AMERICA, N.A.
To: TELEPHONICS CORPORATION
Reel/Frame 061045/0214 →
Security Interest (Abl)
Aug 10, 2022
From: TELEPHONICS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 061144/0147 →
Security Interest (Term Loan)
Aug 10, 2022
From: TELEPHONICS CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 061144/0162 →
Assignment of Assignor's Interest
Jan 11, 2023
From: KIRKEBY, NIELS; LEN, MICHAEL
To: TTM TECHNOLOGIES INC.
Reel/Frame 062348/0179 →
Assignment of Assignor's Interest
Jan 20, 2023
From: KIRKEBY, NIELS HUSTED; FITZGERALD, BRADY; LEN, MICHAEL; LINGEL, THOMAS
To: TTM TECHNOLOGIES INC.
Reel/Frame 062440/0129 →
Assignment of Assignor's Interest
Apr 5, 2023
From: LEN, MICHAEL; KOOP, NICHOLAS S.; KEMPF, ANDREW; GORTNER, MATT
To: TTM TECHNOLOGIES, INC.
Reel/Frame 063226/0273 →
Assignment of Assignor's Interest
Apr 5, 2023
From: LEN, MICHAEL; KOOP, NICHOLAS S.; KEMPF, ANDREW; GORTNER, MATT
To: TTM TECHNOLOGIES, INC.
Reel/Frame 063226/0319 →
Assignment of Assignor's Interest
May 17, 2023
From: SENK, DAVID; IMMONEN, MARIKA
To: TTM TECHNOLOGIES, INC.
Reel/Frame 063674/0798 →
Assignment of Assignor's Interest
May 17, 2023
From: KIRKEBY, NIELS HUSTED
To: TTM TECHNOLOGIES, INC.
Reel/Frame 063674/0245 →