IP Library Patent Application 17725371
Patent Application
App. No. 17/725,371

HIGH POWERED RF PART FOR IMPROVED MANUFACTURABILITY

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Quick Facts
Patent No.
US None
App. No.
17/725,371
Abstract

An electrical component, such as an RF device or thermal bridge, for use with a printed circuit board. The component may include a first dielectric layer having a top and a bottom, and a first conductive trace positioned on the bottom of the first dielectric layer. The component may also include a first ground layer positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace and a first solder layer connecting the first conductive trace to a second conductive trace of the printed circuit board and extending the full length of the first conductive trace. The component may also include a third conductive trace over the top of the first dielectric layer. The component may also include a pad under the first dielectric layer. The pad is soldered to a signal contact region of the printed circuit board. The third conductive trace is coupled to signal outputs formed by the signal contact region of the printed circuit board through a first via. The component may also include a second solder layer connecting the first ground layer of the component to a second ground layer positioned on the printed circuit board.

Claims (44)

1 . An electrical component for a printed circuit board, comprising:

a first dielectric layer having a top and a bottom;

a first conductive trace positioned on the bottom of the first dielectric layer;

a first ground layer positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace;

a first solder layer connecting the first conductive trace to a second conductive trace of the printed circuit board and extending the full length of the first conductive trace;

a third conductive trace over the top of the first dielectric layer;

a pad under the first dielectric layer, wherein the pad is soldered to a signal contact region of the printed circuit board, wherein the third conductive trace is coupled to signal outputs formed by the signal contact region of the printed circuit board through a first via; and

a second solder layer connecting the first ground layer of the component to a second ground layer positioned on the printed circuit board.

2 . The component of claim 1 , wherein the electrical component has a thermal path comprising the first conductive trace, the first dielectric layer, the first ground layer, the first solder layer, and the second ground layer positioned on the printed circuit board.

3 . The component of claim 1 , further comprising a third ground layer positioned on the top of the first dielectric layer and a second via spanning the first dielectric layer to connect the third ground layer to the first ground layer.

4 . The component of claim 3 , further comprising a fourth ground layer positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace and the first ground layer, and a fourth solder layer connecting the fourth ground layer of the component to a fifth ground layer of the printed circuit board.

5 . The component of claim 4 , further comprising a second dielectric layer over the third conductive trace and a sixth ground layer positioned on top of the second dielectric layer.

6 . The component of claim 5 , wherein a third via spans through the first dielectric layer and the second dielectric layer to connect the fourth ground layer to the sixth ground layer.

7 . The component of claim 1 , wherein the second conductive trace comprises a transmission line and is a portion of the electrical component.

8 . The component of claim 1 , wherein the first dielectric layer is formed from a ceramic material.

9 . The component of claim 8 , wherein the ceramic material is selected from the group consisting of AlN and Al 2 O 3 .

10 . The component of claim 1 , wherein the first conductive trace is wider than the second conductive trace.

11 . The component of claim 1 , wherein the first conductive trace is narrower than the second conductive trace.

12 . The component of claim 1 , wherein the first conductive trace is aligned with the second conductive trace on top of the printed circuit board along a full length of the first conductive trace.

13 . An electrical component for a printed circuit board, comprising:

a first dielectric layer having a top and a bottom;

a first conductive trace positioned on the bottom of the first dielectric layer;

a first ground layer positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace;

a first solder layer connecting the first conductive trace to the second conductive trace of the printed circuit board and extending the full length of the first conductive trace;

a third conductive trace over the top of the first dielectric layer;

a second dielectric layer over the top of the third conductive trace;

a second solder layer connecting the first ground layer of the component to a second ground layer positioned on the printed circuit board;

a third ground layer positioned on top of the second dielectric layer; and

a first via spanning through the first dielectric layer and the second dielectric layer to connect the first ground layer to the third ground layer.

14 . The component of claim 13 , wherein the electrical component has a thermal path comprising the first conductive trace, the first dielectric layer, the first ground layer, the second solder layer, and the second ground layer positioned on the printed circuit board.

15 . An electrical component for a printed circuit board, comprising:

a first dielectric layer having a top and a bottom;

a first conductive trace positioned on the bottom of the first dielectric layer;

a first ground layer positioned on the bottom of the first dielectric layer and spaced apart from the first conductive trace;

a first solder layer connecting the first conductive trace to the second conductive trace of the printed circuit board and extending the full length of the first conductive trace;

a third conductive trace over the top of the first dielectric layer;

a second solder layer connecting the first ground layer of the component to a second ground layer positioned on the printed circuit board;

a third ground layer positioned on top of the first dielectric layer, the third ground layer being spaced apart from the third conductive trace; and

a first via spanning through the first dielectric layer to connect the first ground layer to the third ground layer.

16 . The component of claim 15 , wherein the electrical component has a thermal path comprising the first conductive trace, the first dielectric layer, the first ground layer, the second solder layer, and the second ground layer positioned on the printed circuit board.

17 . The component of claim 15 , further comprising two or more pads under the first dielectric layer, wherein the two or more pads are soldered to two or more signal contact regions of the printed circuit board.

18 . The component of claim 17 , wherein the third conductive trace is connected to signal outputs formed by the two or more signal contact regions of the printed circuit board through a second via.

19 . The component of claim 15 , wherein the third conductive trace comprises a transmission line and is a portion of the electrical component.

20 . The component of claim 15 , wherein the first dielectric layer is formed from a ceramic material, wherein the ceramic material is selected from the group consisting of AlN and Al 2 O 3 , wherein the first conductive trace is aligned with the third conductive trace and with the second conductive trace on top of the printed circuit board along a full length of the first conductive trace.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2023
From: LEN, MICHAEL; OSTERGAARD, HABS PETER
To: TTM TECHNOLOGIES, INC.
Reel/Frame 064543/0307 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →