IP Library Granted Patent US 8,950,063
Granted Patent B2
US 8,950,063 · App. 12/938,265 · Granted Feb 10, 2015

Methods of manufacturing printed circuit boards with stacked micro vias

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Quick Facts
Patent No.
US 8,950,063
App. No.
12/938,265
Granted
Feb 10, 2015
Kind
B2
Abstract

A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.

Claims (13)

1. A method of manufacturing at least a portion of a printed circuit board, the method comprising:

imaging at least one photo resist onto a first plural-layer substrate having a metal foil formed on a first side of the first plural-layer substrate;

etching off the metal foil from the first plural-layer substrate with exception of at least one part of the metal foil covered by the at least one photo resist;

stripping off the at least one photo resist to expose the at least one part of the metal foil to form at least one first metal pad on the first side of the first plural-layer substrate;

providing a lamination adhesive and a protective film;

forming at least one via into the protective film and the lamination adhesive to expose the at least one first metal pad on the first side of the first plural-layer substrate comprising a plurality of first circuit layers;

filling at least one conductive paste into the via formed in the lamination adhesive and the protective film;

removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and

linking the first plural-layer substrate with a second plural-layer substrate comprising a plurality of second circuit layer with at least one second metal pad on a second side of the second plural-layer substrate.

2. The method of claim 1 , wherein the providing of the lamination adhesive and the protective film comprises:

applying the lamination adhesive and the protective film on the first plural-layer substrate comprising the plurality of first circuit layers with the at least one first metal pad on the first side of the first plural-layer substrate, the lamination adhesive being between the protective film and the first plural-layer substrate.

3. The method of claim 1 , wherein the linking of the first plural-layer substrate with the second plural-layer substrate comprises: aligning the first plural-layer substrate with the second plural-layer substrate; and curing the lamination adhesive between the first plural-layer substrate and the second plural-layer substrate to laminate the first and second plural-layer substrates with each other.

4. The method of claim 1 , wherein the at least one via has a diameter between about 0.004″ and about 0.010″.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (035858/0890) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TTM TECHNOLOGIES, INC. (FORMERLY KNOWN AS VIASYSTEMS GROUP, INC. AND VIASYSTEMS, INC.); TTM TECHNOLOGIES NORTH AMERICA, LLC (FORMERLY KNOWN AS VIASYSTEMS TECHNOLOGIES CORP., L.L.C.)
Reel/Frame 075681/0922 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →
CHANGE OF NAME Recorded Sep 9, 2019
From: VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 050314/0305 →
PATENT SECURITY AGREEMENT-TERM Recorded Jun 8, 2015
From: TTM TECHNOLOGIES, INC.; VIASYSTEMS, INC.; VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 035851/0928 →
PATENT SECURITY AGREEMENT-ABL Recorded Jun 8, 2015
From: TTM TECHNOLOGIES, INC.; VIASYSTEMS, INC.; VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 035858/0890 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2014
From: VIASYSTEMS NORTH AMERICA OPERATIONS, INC.
To: VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
Reel/Frame 031937/0500 →
CHANGE OF NAME Recorded Dec 31, 2013
From: DDI GLOBAL CORP.
To: VIASYSTEMS NORTH AMERICA OPERATIONS, INC.
Reel/Frame 031863/0129 →
CHANGE OF NAME Recorded Jul 19, 2012
From: DYNAMIC DETAILS, INCORPORATED
To: DDI GLOBAL CORP.
Reel/Frame 028603/0854 →