Methods of manufacturing printed circuit boards
View Patent ↗Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.
1. A method of manufacturing a printed circuit board comprising:
providing a core subassembly comprising at least one metal layer carrier;
providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, wherein the parallel processing of at least one of the plurality of one-metal layer carriers comprises:
imaging photo resist onto at least one part of a substrate having at least one copper foil formed on a first surface of the substrate;
etching portions of the at least one copper foil from the substrate;
removing the at least one photo resist to expose the at least one part of the at least one copper foil thereby forming at least one copper foil pad;
applying a lamination adhesive to a second surface of the substrate;
applying a protective film to the lamination adhesive;
forming at least one micro via in the second surface of the substrate to expose the at least one copper foil pad;
filling conductive paste into the at least one micro via; and
removing the protective film to expose the lamination adhesive on the substrate for attachment; and
attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly,
wherein the substrate comprises a substrate selected from the group consisting of a flexible substrate and a rigid-flex substrate.
2. The method of claim 1 , wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the core subassembly comprises:
attaching the at least two of the plurality of one-metal layer carriers with each other and with a first surface of the core subassembly; and
attaching at least two of the plurality of one-metal layer carriers with each other and with a second surface of the core subassembly.
3. The method of claim 1 , wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the core subassembly comprises:
attaching the at least two of the plurality of one-metal layer carriers with each other to form a first single lamination subassembly and with a first surface of the core subassembly; and
attaching a first buildup layer, having at least one micro via, to a surface of the first single lamination subassembly.
4. The method of claim 1 , wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the core subassembly comprises:
attaching the at least two of the plurality of one-metal layer carriers with each other to form a first single lamination subassembly and with a first surface of the core subassembly;
attaching at least two of the plurality of one-metal layer carriers with each other to form a second single lamination subassembly and with a second surface of the core subassembly;
attaching a first buildup layer, having at least one micro via, to a surface of the first subassembly; and
attaching a second buildup layer, having at least one micro via, to a surface of the second subassembly.
5. The method of claim 1 , wherein the core subassembly comprises at least one micro via.
6. The method of claim 1 , wherein the core subassembly comprises at least one active device.
7. The method of claim 6 , wherein the at least one active device comprises a device selected from the group consisting of a transistor and an integrated circuit.
8. The method of claim 1 :
wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the core subassembly comprises attaching the at least two of the plurality of one-metal layer carriers with each other to form a first single lamination subassembly and with a surface of the core subassembly;
wherein the core subassembly comprises a via;
wherein a position of the via of the core subassembly is offset from a position of the micro vias of the first single lamination subassembly.
9. The method of claim 8 , wherein the via of the core subassembly is a plated through hole via.
10. The method of claim 8 , wherein the via of the core subassembly is a micro via.
11. The method of claim 8 , wherein the via of the core subassembly is a micro via filled with copper.
12. The method of claim 8 , wherein the via of the core subassembly is a micro via filled with conductive paste.
13. The method of claim 1 :
wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the core subassembly comprises attaching the at least two of the plurality of one-metal layer carriers with each other to form a first single lamination subassembly and with a surface of the core subassembly;
wherein the core subassembly comprises a via;
wherein a position of the via of the core subassembly is substantially aligned with a position of the micro vias of the first single lamination subassembly.
14. A method of manufacturing a printed circuit board comprising:
providing a core subassembly comprising at least one metal layer carrier;
providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, wherein the parallel processing of at least one of the plurality of one-metal layer carriers comprises:
imaging photo resist onto at least one part of a substrate having at least one copper foil formed on a first surface of the substrate;
etching portions of the at least one copper foil from the substrate;
removing the at least one photo resist to expose the at least one part of the at least one copper foil thereby forming at least one copper foil pad;
applying a lamination adhesive to a second surface of the substrate;
applying a protective film to the lamination adhesive;
forming at least one micro via in the second surface of the substrate to expose the at least one copper foil pad;
filling conductive paste into the at least one micro via; and
removing the protective film to expose the lamination adhesive on the substrate for attachment;
attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly;
providing at least one second one-metal layer carrier after parallel processing the one-metal layer carrier, wherein the parallel processing of the second one-metal layer carrier comprises:
applying a second lamination adhesive to a second surface of a second substrate having a copper foil formed on a first surface of the second substrate;
applying a second protective film to the second lamination adhesive;
forming at least one micro via in the second surface of the second substrate to expose a portion of the copper foil;
filling conductive paste into the at least one micro via; and
removing the second protective film to expose the second lamination adhesive on the second substrate for attachment;
wherein the attaching the at least two of the plurality of one-metal layer carriers with each other and with the surface of the core subassembly comprises:
attaching the at least two of the plurality of one-metal layer carriers with each other to form a first single lamination subassembly and with a surface of the core subassembly; and
attaching the at least one second one-metal layer carrier to a surface of the first single lamination subassembly.
15. The method of claim 14 , further comprising:
attaching the at least two of the plurality of one-metal layer carriers with each other to form a second single lamination subassembly and with a second surface of the core subassembly; and
attaching a second one-metal layer carrier of the at least one second one-metal layer carrier to a surface of the second single lamination subassembly.
16. A method of manufacturing a printed circuit board comprising:
providing a core subassembly comprising at least one metal layer carrier;
providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, wherein the parallel processing of at least one of the plurality of one-metal layer carriers comprises:
imaging photo resist onto at least one part of a substrate having at least one copper foil formed on a first surface of the substrate;
etching portions of the at least one copper foil from the substrate;
removing the at least one photo resist to expose the at least one part of the at least one copper foil thereby forming at least one copper foil pad;
applying a lamination adhesive to a second surface of the substrate;
applying a protective film to the lamination adhesive;
forming at least one micro via in the second surface of the substrate to expose the at least one copper foil pad;
filling conductive paste into the at least one micro via; and
removing the protective film to expose the lamination adhesive on the substrate for attachment;
attaching at least two of the plurality of one-metal layer carriers with each other and with a first surface of the core subassembly; and
attaching at least two of the plurality of one-metal layer carriers with each other and with a second surface of the core subassembly,
wherein the substrate comprises a substrate selected from the group consisting of a flexible substrate and a rigid-flex substrate.
17. A method of manufacturing a printed circuit board comprising:
providing a core subassembly comprising at least one metal layer carrier;
attaching a plurality of one-metal layer carriers with each other after parallel processing each of the plurality of one-metal layer carriers to form a first subassembly, wherein the parallel processing of at least one of the plurality of one-metal layer carriers comprises:
imaging photo resist onto at least one part of a substrate having at least one copper foil formed on a first surface of the substrate;
etching portions of the at least one copper foil from the substrate;
removing the at least one photo resist to expose the at least one part of the at least one copper foil thereby forming at least one copper foil pad;
applying a lamination adhesive to a second surface of the substrate;
applying a protective film to the lamination adhesive;
forming at least one micro via in the second surface of the substrate to expose the at least one copper foil pad;
filling conductive paste into the at least one micro via; and
removing the protective film to expose the lamination adhesive on the substrate for attachment;
attaching a plurality of one-metal layer carriers with each other after parallel processing each of the plurality of one-metal layer carriers to form a second subassembly;
attaching the first subassembly to a first surface of the core subassembly; and
attaching the second subassembly to a second surface of the core subassembly,
wherein the substrate comprises a substrate selected from the group consisting of a flexible substrate and a rigid-flex substrate.