Method of treating conductive layer for use in a circuitized substrate and method of making said substrate having said conductive layer as part thereof
View Patent ↗A method of treating a conductive layer to assure enhanced adhesion of the layer to selected dielectric layers used to form a circuitized substrate. The conductive layer includes at least one surface with the appropriate roughness to enable such adhesion and also good signal passage if the layer is used as a signal layer. The method is extendible to the formation of such substrates, including to the formation of multilayered substrates having many conductive and dielectric layers. Such substrates may include one or more electrical components (e.g., semiconductor chips) mounted thereon and may also be mounted themselves onto other substrates.
1. A method of treating a conductive layer for use in a circuitized substrate, said method comprising:
providing a conductive layer of a first metal having at least one smooth side including a first roughness;
depositing a layer of a second metal different than said first metal on said at least one smooth side of said conductive layer;
exposing said layer of said second metal on said at least one smooth side of said conductive layer to a solution to reduce the amount of said second metal within said layer of said second metal; and
providing a thin polymer layer on said layer of said second metal after said reducing of said second metal to protect said layer of said second metal and to increase the roughness of said conductive layer to a second roughness greater than said first roughness.
2. The method of claim 1 wherein said depositing of said layer of said second metal different than said first metal on said at least one smooth side of said conductive layer is accomplished using electrolytic plating.
3. The method of claim 1 wherein said layer of said second metal comprises at least two sub-layers, each of a different metal.
4. The method of claim 3 wherein a first of said sub-layers comprises chromium and a second of said sub-layers comprises zinc.
5. The method of claim 4 wherein said sub-layers are deposited using electrolytic plating.
6. The method of claim 1 wherein said exposing of said layer of said second metal to a solution to reduce the amount of said second metal within said layer of said second metal comprises exposing said layer of said second metal to a stripper solution.
7. The method of claim 6 wherein said stripper solution comprises butyl carbitol and ethanolamine.
8. The method of claim 1 wherein said thin polymer layer on said layer of said second metal after said reducing of said second metal to protect said layer of said second metal and to increase the roughness of said conductive layer to a second roughness greater than said first roughness comprises benzotriazole.
9. The method of claim 1 wherein said exposing of said layer of said second metal on said at least one smooth side of said conductive layer to a solution to reduce the amount of said second metal within said layer of said second metal is accomplished using a fluid treatment device.
10. A method of making a circuitized substrate, said method comprising:
providing a conductive layer of a first metal having at least one smooth side including a first roughness;
depositing a layer of a second metal different than said first metal on said at least one smooth side of said conductive layer;
exposing said layer of said second metal on said at least one smooth side of said conductive layer to a solution to reduce the amount of said second metal within said layer of said second metal;
providing a thin polymer layer on said layer of said second metal after said reducing of said second metal to protect said layer of said second metal and to increase the roughness of said conductive layer to a second roughness greater than said first roughness;
providing a dielectric layer;
bonding said conductive layer to said dielectric layer such that said layer of said second metal on said conductive layer having said thin polymer layer thereon contacts said dielectric layer; and
forming a circuit pattern within said conductive layer.
11. The method of claim 10 wherein said depositing of said layer of said second metal different than said first metal on said at least one smooth side of said conductive layer is accomplished using electrolytic plating.
12. The method of claim 10 wherein said layer of said second metal comprises at least two sub-layers, each of a different metal.
13. The method of claim 12 wherein said sub-layers are deposited using electrolytic plating.
14. The method of claim 10 wherein said exposing of said layer of said second metal to a solution to reduce the amount of said second metal within said layer of said second metal comprises exposing said layer of said second metal to a stripper solution.
15. The method of claim 10 wherein said exposing of said layer of said second metal on said at least one smooth side of said conductive layer to a solution to reduce the amount of said second metal within said layer of said second metal is accomplished using a fluid treatment device.
16. The method of claim 10 wherein said bonding of said electrically conductive layer to said dielectric layer is accomplished using a lamination process.
17. The method of claim 10 further including providing a plurality of conductive openings within said circuitized substrate following said bonding of said electrically conductive layer to said dielectric layer.
18. The method of claim 10 wherein said forming of said circuit pattern within said electrically conductive layer is accomplished using photolithographic processing.
19. The method of claim 10 further including bonding additional dielectric and electrically conductive layers on opposite sides of said circuitized substrate having said dielectric layer and said electrically conductive layer, and forming a circuit pattern within selected ones of said additional electrically conductive layers.
20. The method of claim 19 further including positioning at least one electrical component on said circuitized substrate and electrically coupling said at least one electrical component to one or more of said electrically conductive layers to form an electrical assembly.
21. The method of claim 10 further including positioning at least one electrical component on said circuitized substrate and electrically coupling said at least one electrical component to said electrically conductive layer to form an electrical assembly.