IP Library Granted Patent US 7,442,879
Granted Patent B2
US 7,442,879 · App. 11/244,180 · Granted Oct 28, 2008

Circuitized substrate with solder-coated microparticle paste connections, multilayered substrate assembly, electrical assembly and information handling system utilizing same and method of making said substrate

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Quick Facts
Patent No.
US 7,442,879
App. No.
11/244,180
Granted
Oct 28, 2008
Kind
B2
Abstract

A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a binder component and at least one metallic component including microparticles. In another embodiment, the paste includes the binder and a plurality of nano-wires. Selected ones of the microparticles or nano-wires include a layer of solder thereon. A method of making such a substrate is also provided, as are an electrical assembly and information handling system adapter for having such a substrate as part thereof.

Claims (63)

1. A circuitized substrate comprising:

at least one organic dielectric layer having first and second opposing surfaces;

at least one opening within said at least one organic dielectric layer extending from said first opposing surface to said second opposing surface;

a quantity of conductive paste positioned within said at least one opening, said quantity of conductive paste including a fluxless binder component and at least one metallic component including a plurality of particles in the nanoparticle and microparticle range, selected ones of said particles of said metallic component also including a quantity of solder thereon, said solder comprising metallic elements different from the elements of said particles; and

a protective coating disposed over said solder for preventing oxidation thereof.

2. The circuitized substrate of claim 1 in which said at least one organic dielectric layer is of a material selected from the group of materials consisting of fiberglass-reinforced epoxy resin, polytetrafluoroethylene, polyimide, polyamide, cyanate resin, photo-imageable material and combinations thereof.

3. The circuitized substrate of claim 1 wherein said metallic component is selected from the group consisting of copper, silver, gold, zinc, cadmium, palladium, iridium, ruthenium, osmium, rhodium, platinum, iron, cobalt, nickel, indium, tin, antimony, lead, bismuth and alloys thereof.

4. The circuitized substrate of claim 1 wherein said quantity of solder is selected from the group consisting of tin-lead, bismuth-tin, bismuth-tin-iron, tin, tin-silver, tin-gold, tin-silver-zinc, tin-silver-zinc-copper, tin-bismuth-silver, tin-copper, tin-copper-silver, tin-indium-silver, tin-antimony, tin-zinc, tin-zinc-indium, copper-based solders, and alloys thereof.

5. The circuitized substrate of claim 1 wherein said at least one opening is a thru-hole.

6. The circuitized substrate of claim 1 wherein said conductive paste is a low temperature conductive paste and said at least one dielectric layer is a high temperature dielectric.

7. The circuitized substrate of claim 1 further including at least one electrical component electrically coupled to said conductive paste, said circuitized substrate and said at least one electrical component forming an electrical assembly.

8. The circuitized substrate of claim 7 further including a housing, said electrical assembly being positioned within said housing, said housing and said electrical assembly forming an information handling system.

9. The circuitized substrate in accordance with claim 1 , wherein said protective coating comprises at least one precious metal.

10. A circuitized substrate comprising:

first and second organic dielectric layers each having a first surface thereon, said first surface of said first organic dielectric layer facing said first surface of said second organic dielectric layer;

at least one electrical conductor positioned on each of said first surfaces of said first and second organic dielectric layers;

a quantity of conductive paste interconnecting said at least one electrical conductor on said first surface of said first organic dielectric layer to said at least one electrical conductor on said first surface of said second organic dielectric layer, said quantity of conductive paste including a fluxless binder component and at least one metallic component including a plurality of microparticles, selected ones of said microparticles of said metallic component including a quantity of solder thereon; and

a protective coating disposed over said solder for preventing oxidation thereof.

11. The circuitized substrate of claim 10 in which said at least one organic dielectric layer is of a material selected from the group of materials consisting of fiberglass-reinforced epoxy resin, polytetrafluoroethylene, polyimide, polyamide, cyanate resin, photo-imageable material and combinations thereof.

12. The circuitized substrate of claim 10 wherein said metallic component is selected from the group consisting of copper, silver, gold, zinc, cadmium, palladium, iridium, ruthenium, osmium, rhodium, platinum, iron, cobalt, nickel, indium, tin, antimony, lead, bismuth and alloys thereof.

13. The circuitized substrate of claim 10 wherein said quantity of solder is selected from the group consisting of tin-lead, bismuth- tin, bismuth-tin-iron, tin, tin-silver, tin- gold, tin-silver-zinc, tin-silver-zinc-copper, tin-bismuth-silver, tin-copper, tin-copper-silver, tin-indium-silver, tin-antimony, tin-zinc, tin-zinc-indium, copper-based solders, and alloys thereof.

14. The circuitized substrate of claim 10 wherein said conductive paste is a low temperature conductive paste and said at least one dielectric layer is a high temperature dielectric.

15. The circuitized substrate of claim 10 further including at least one electrical component electrically coupled to said conductive paste, said circuitized substrate and said at least one electrical component forming an electrical assembly.

16. The circuitized substrate of claim 15 further including a housing, said electrical assembly being positioned within said housing, said housing and said electrical assembly forming an information handling system.

17. The circuitized substrate in accordance with claim 10 , wherein said protective coating comprises at least one precious metal.

18. A method of making a circuitized substrate, said method comprising:

providing at least one organic dielectric layer having first and second opposing surfaces;

forming at least one opening within said at least one organic dielectric layer extending from said first opposing surface to said second opposing surface;

positioning a quantity of conductive paste within said at least one opening, said quantity of conductive paste including a fluxless binder component and at least one metallic component including a plurality of microparticles, selected ones of said microparticles of said metallic component including a quantity of solder thereon; and

disposing a protective coating over said solder for preventing oxidation thereof.

19. The method of claim 18 wherein said forming of said at least one opening within said at least one organic dielectric layer is accomplished using laser or mechanical drilling.

20. The method of claim 18 wherein said positioning of said conductive paste within said at least one opening is accomplished using printing or needle dispensing.

21. The method of making a circuitized substrate in accordance with claim 18 , wherein said protective coating comprises at least one precious metal.

22. A method of making a circuitized substrate, said method comprising:

providing first and second organic dielectric layers each having a first surface thereon;

forming at least one electrical conductor on each of said first surfaces of said first and second organic dielectric layers;

orienting said first and second dielectric layers such that said first surface of said first organic dielectric layer having at least one of said electrical conductors thereon faces said first surface of said second organic dielectric layer having at least one of said electrical conductors thereon;

positioning a quantity of conductive paste between said first and second organic dielectric layers to interconnect said at least one electrical conductor on said first surface of said first organic dielectric layer to said at least one electrical conductor on said first surface of said second organic dielectric layer, said quantity of conductive paste including a fluxless binder component and at least one metallic component including a plurality of microparticles, selected ones of said microparticles of said metallic component including a quantity of solder thereon; and

disposing a protective coating over said solder for preventing oxidation thereof.

23. The method of claim 22 wherein said forming of said at least one electrical conductor on each of said first surfaces of said first and second organic dielectric layers is accomplished using photolithography processing.

24. The method of claim 22 wherein said positioning of said conductive paste within said at least one opening is accomplished using printing or needle dispensing.

25. The method of making a circuitized substrate in accordance with claim 22 , wherein said protective coating comprises at least one precious metal.

26. A circuitized substrate comprising:

at least one organic dielectric layer having first and second opposing surfaces;

at least one opening within said at least one organic dielectric layer extending from said first opposing surface to said second opposing surface; and

a quantity of conductive paste positioned within said at least one opening, said quantity of conductive paste including a binder component and a plurality of nano-wires, selected ones of said nano-wires including a quantity of solder thereon.

27. The circuitized substrate of claim 26 wherein said at least one organic dielectric layer is of a material selected from the group of materials consisting of fiberglass-reinforced epoxy resin, polytetrafluoroethylene, polyimide, polyamide, cyanate resin, photo-imageable material and combinations thereof.

28. The circuitized substrate of claim 26 wherein said nano-wires are nano-tubes.

29. The circuitized substrate of claim 26 wherein said quantity of solder is selected from the group consisting of tin-lead, bismuth-tin, bismuth-tin-iron, tin, tin-silver, tin- gold, tin-silver-zinc, tin-silver-zinc-copper, tin-bismuth-silver, tin-copper, tin-copper-silver, tin-indium-silver, tin-antimony, tin-zinc, tin-zinc-indium, copper-based solders, and alloys thereof.

30. The circuitized substrate of claim 26 wherein said at least one opening is a thru-hole.

31. The circuitized substrate of claim 26 wherein said conductive paste is a low temperature conductive paste and said at least one dielectric layer is a high temperature dielectric.

32. The circuitized substrate of claim 26 further including at least one electrical component electrically coupled to said conductive paste, said circuitized substrate and said at least one electrical component forming an electrical assembly.

33. The circuitized substrate of claim 32 further including a housing, said electrical assembly being positioned within said housing, said housing and said electrical assembly forming an information handling system.

34. A circuitized substrate comprising:

first and second organic dielectric layers each having a first surface thereon, said first surface of said first organic dielectric layer facing said first surface of said second organic dielectric layer;

at least one electrical conductor positioned on each of said first surfaces of said first and second organic dielectric layers; and

a quantity of conductive paste interconnecting said at least one electrical conductor on said first surface of said first organic dielectric layer to said at least one electrical conductor on said first surface of said second organic dielectric layer, said quantity of conductive paste including a binder component and a plurality of nano-wires, selected ones of said nano-wires including a quantity of solder thereon.

35. The circuitized substrate of claim 34 wherein said at least one organic dielectric layer is of a material selected from the group of materials consisting of fiberglass-reinforced epoxy resin, polytetrafluoroethylene, polyimide, polyamide, cyanate resin, photo-imageable material and combinations thereof.

36. The circuitized substrate of claim 34 wherein said quantity of solder is selected from the group consisting of tin-lead, bismuth-tin, bismuth-tin-iron, tin, tin-silver, tin-gold, tin-silver-zinc, tin-silver-zinc-copper, tin-bismuth-silver, tin-copper, tin-copper-silver, tin-indium-silver, tin-antimony, tin-zinc, tin-zinc-indium, copper-based solders, and alloys thereof.

37. The circuitized substrate of claim 34 wherein said at least one opening is a thru-hole.

38. The circuitized substrate of claim 34 wherein said conductive paste is a low temperature conductive paste and said at least one dielectric layer is a high temperature dielectric.

39. The circuitized substrate of claim 34 further including at least one electrical component electrically coupled to said conductive paste, said circuitized substrate and said at least one electrical component forming an electrical assembly.

40. The circuitized substrate of claim 39 further including a housing, said electrical assembly being positioned within said housing, said housing and said electrical assembly forming an information handling system.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2019
From: I3 ELECTRONICS, INC.
To: TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 049758/0265 →
SECURITY INTEREST Recorded Nov 14, 2016
From: I3 ELECTRONICS, INC.
To: M&T BANK
Reel/Frame 040608/0626 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2015
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
To: I3 ELECTRONICS, INC.
Reel/Frame 035442/0569 →
RELEASE OF SECURITY INTEREST Recorded Feb 26, 2015
From: MAINES, WILLIAM; MAINES, DAVID
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 035098/0968 →
RELEASE BY SECURED PARTY Recorded May 14, 2012
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
Reel/Frame 028230/0611 →
SECURITY AGREEMENT Recorded May 14, 2012
From: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.; EI TRANSPORTATION COMPANY LLC; ENDICOTT MEDTECH, INC.
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 028230/0798 →