IP Library Granted Patent US 9,485,876
Granted Patent B2
US 9,485,876 · App. 14/518,434 · Granted Nov 1, 2016

Methods of manufacturing printed circuit boards with stacked micro vias

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Quick Facts
Patent No.
US 9,485,876
App. No.
14/518,434
Granted
Nov 1, 2016
Kind
B2
Abstract

A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.

Claims (25)

1. A method of manufacturing at least a portion of a printed circuit board, the method comprising:

attaching a plurality of plural-layer substrates with each other after processing at least one of the plurality of plural-layer substrates, wherein each of the plurality of plural-layer substrates comprising a plurality of circuit layers with at least one metal pad on a side of each of the plurality of plural-layer substrates and the processing of the at least one of the plurality of plural-layer substrates comprises:

imaging at least one photo resist onto the at least one of the plurality of plural-layer substrates having a metal foil formed on the side of the at least one of the plurality of plural-layer substrates;

etching off the metal foil from the at least one of the plurality of plural-layer substrates with exception of at least one part of the metal foil covered by the at least one photo resist;

stripping off the at least one photo resist to expose the at least one part of the metal foil to form the at least one metal pad on the side of the at least one of the plurality of plural-layer substrates;

applying a lamination adhesive on the at least one of the plurality of plural-layer substrates;

applying a protective film on the lamination adhesive;

forming at least one via into the lamination adhesive to expose the at least one metal pad on the side of the at least one of the plurality of plural-layer substrates;

filling at least one conductive paste into the at least one via formed in the lamination adhesive; and

removing the protective film to expose the lamination adhesive on the at least of the plurality of plural-layer substrates for attachment with the other plurality of plural-layer substrates.

2. The method of claim 1 , wherein the attaching of the plurality of plural-layer substrates comprises:

aligning the plurality of plural-layer substrates to each other; and

curing the lamination adhesive on the at least one of the plurality of plural-layer substrates to laminate the plurality of plural-layer substrates with each other.

3. The method of claim 1 , wherein the at least one of the plurality of plural-layer substrates comprises at least two circuit layers.

4. The method of claim 1 , wherein the at least one of the plurality of plural-layer substrates comprises at least three circuit layers.

5. The method of claim 1 , wherein the at least one of the plurality of plural-layer substrates comprises at least four circuit layers.

6. The method of claim 1 , wherein each of the plurality of plural-layer substrates comprises a core material selected from the group consisting of metal materials, ceramic materials, organic materials, carbon materials, glass materials, and combinations thereof.

7. The method of claim 1 , wherein the protective film comprises a material selected from the group consisting of polyester, oriented polypropylene, polyvinylfluoride, polyethylene, high density polyethylene, polyethylene napthalate, pacothane, polymethylpentene, and combinations thereof.

8. The method of claim 7 , wherein the protective film is Mylar.

9. The method of claim 1 , wherein the at least one via is formed by laser drilling.

10. The method of claim 1 , wherein the at least one via is formed by mechanical drilling.

11. The method of claim 1 , wherein the at least one via has a diameter between about 0.004″ and about 0.010″.

12. The method of claim 1 , wherein the attached plurality of plural-layer substrates has a first outermost side and a second outermost side opposite the first outermost side and comprises a metal foil formed on at least one of the first outermost side or the second outermost side.

13. The method of claim 12 , further comprising:

stripping off the at least one photo resist to expose the at least one part of the metal foil to form at least another metal pad on the at least one of the first outermost side or the second outermost side.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (035858/0890) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TTM TECHNOLOGIES, INC. (FORMERLY KNOWN AS VIASYSTEMS GROUP, INC. AND VIASYSTEMS, INC.); TTM TECHNOLOGIES NORTH AMERICA, LLC (FORMERLY KNOWN AS VIASYSTEMS TECHNOLOGIES CORP., L.L.C.)
Reel/Frame 075681/0922 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →
CHANGE OF NAME Recorded Sep 9, 2019
From: VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 050314/0305 →
PATENT SECURITY AGREEMENT-ABL Recorded Jun 8, 2015
From: TTM TECHNOLOGIES, INC.; VIASYSTEMS, INC.; VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 035858/0890 →
PATENT SECURITY AGREEMENT-TERM Recorded Jun 8, 2015
From: TTM TECHNOLOGIES, INC.; VIASYSTEMS, INC.; VIASYSTEMS TECHNOLOGIES CORP., L.L.C.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 035851/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2015
From: KUMAR, RAJ; DREYER, MONTE P.; TAYLOR, MICHAEL J.
To: VIASYSTEMS TECHNOLOGIES CORP. L.L.C.
Reel/Frame 035387/0818 →