IP Library Granted Patent US 7,728,694
Granted Patent B2
US 7,728,694 · App. 11/829,420 · Granted Jun 1, 2010

Surface mount stripline devices having ceramic and soft board hybrid materials

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Quick Facts
Patent No.
US 7,728,694
App. No.
11/829,420
Granted
Jun 1, 2010
Kind
B2
Abstract

The present invention is directed to a method for making a hybrid material stripline device. The method includes providing an inner layer of material, the inner layer including a dielectric material and at least one conductive sheet. At least one stripline device is formed in the inner layer by processing the at least one conductive sheet. The at least one stripline device is characterized by a surface area footprint. A first exterior layer and a second exterior layer are provided. At least one of the first exterior layer and/or the second exterior layer includes at least one ceramic portion. The at least one ceramic portion has a ceramic surface area greater than or substantially equal to the surface area footprint of the at least one stripline device. At least one of the first exterior layer and/or the second exterior layer further includes a softboard dielectric material. The inner layer of material is sandwiched between the first exterior layer and the second exterior layer. The first exterior layer, the inner layer and the second exterior layer are laminated to form a laminate panel structure, a surface of the first exterior layer forming a first major surface of the laminate panel structure and a surface of the second exterior layer forming a second major surface of the laminate panel structure. A first conductive sheet is disposed over the first major surface and a second conductive sheet is disposed over the second major surface, the first conductive sheet and the second conductive sheet being configured as parallel ground planes for the at least one stripline device.

Claims (35)

1. A method for making a hybrid material stripline device, the method comprising:

providing an inner layer of material, the inner layer including a dielectric material and at least one conductive sheet;

forming at least one stripline device in the inner layer by processing the at least one conductive sheet, the at least one stripline device being characterized by a surface area footprint;

providing a first exterior layer and a second exterior layer, the first exterior layer and/or the second exterior layer including at least one ceramic portion, the at least one ceramic portion having a ceramic surface area greater than or substantially equal to the surface area footprint of the at least one stripline device, the first exterior layer and/or the second exterior layer further comprising a softboard dielectric material, the at least one ceramic portion being separate and distinct from the softboard dielectric material;

sandwiching the inner layer of material between the first exterior layer and the second exterior layer;

laminating the first exterior layer, the inner layer and the second exterior layer to form a laminate panel structure, a surface of the first exterior layer forming a first major surface of the laminate panel structure and a surface of the second exterior layer forming a second major surface of the laminate panel structure; and

disposing a first conductive sheet over the first major surface and a second conductive sheet over the second major surface, the first conductive sheet and the second conductive sheet being configured as parallel ground planes for the at least one stripline device.

2. The method of claim 1 , wherein the at least one stripline device includes a plurality of stripline devices.

3. The method of claim 2 , wherein the at least one ceramic portion includes a plurality of ceramic portions, each of the plurality of ceramic portions being aligned with a corresponding one of the plurality of stripline devices.

4. The method of claim 3 , wherein the plurality of stripline devices and the corresponding plurality of ceramic portions are disposed in an N×M rectangular array of devices, N and M being integer values greater than or equal to two (2).

5. The method of claim 3 , wherein the surface area footprint is less than 1.0 square inches.

6. The method of claim 3 , wherein the first major surface and the second major surface have surface areas greater than or equal to one square foot.

7. The method of claim 2 , wherein the at least one ceramic portion is configured to cover two or more of the plurality of stripline devices.

8. The method of claim 2 , wherein the at least one ceramic portion includes a single ceramic sheet configured to cover all of the plurality of stripline devices, the single ceramic sheet comprising or substantially comprising the first exterior layer, the second exterior layer being substantially comprised of the softboard material.

9. The method of claim 2 , further comprising the step of dividing the laminated panel structure into the plurality of stripline devices.

10. The method of claim 1 , wherein the step of forming the at least one strip line device includes forming a transmission line structure.

11. The method of claim 1 , wherein the at least one conductive sheet includes parallel conductive sheets disposed on either side of the dielectric material of the inner layer, and the step of forming includes processing each of the parallel conductive sheets.

12. The method of claim 11 , wherein the step of forming the at least one strip line device includes selecting the at least one stripline device from a group of stripline devices that includes a directional coupler, a balun, a power divider, and/or a power combiner.

13. The method of claim 1 , wherein the at least one ceramic portion is comprised of a material selected from a group of materials that includes alumina, AIN ceramic, BeO, or LTCC.

14. The method of claim 1 , wherein the step of providing the first exterior layer and the second exterior layer includes forming interconnection vias in either or both of the first exterior layer and the second exterior layer, the interconnection vias being coupled to the at least one stripline device.

15. A stripline structure comprising:

a first exterior layer and a second exterior layer disposed in substantially parallel planes one to the other, the first exterior layer and/or the second exterior layer including at least one ceramic portion having a ceramic surface area, the first exterior layer and/or the second exterior layer comprising a softboard dielectric material, the at least one ceramic portion being separate and distinct from the softboard dielectric material;

an inner layer sandwiched between the first exterior layer and the second exterior layer, the inner layer having at least one stripline device therein, the at least one stripline device being characterized by a surface area footprint, the ceramic surface area being greater than or substantially equal to the surface area footprint, the first exterior layer, the inner layer, and the second exterior layer being laminated to thereby form a laminated panel structure, the laminated panel structure having a first exterior major surface and a second exterior major surface;

a first conductive sheet disposed over the first exterior major surface and a second conductive sheet disposed over the second exterior major surface, the first conductive sheet and the second conductive sheet being configured as parallel ground planes for the at least one stripline device; and

a plurality of conductive vias formed in the first exterior layer and/or the second exterior layer, the plurality of conductive vias being in electrical communication with the at least one stripline device.

16. The structure of claim 15 , wherein the at least one stripline device includes a plurality of stripline devices.

17. The structure of claim 16 , wherein the at least one ceramic portion includes a plurality of ceramic portions, each of the plurality of ceramic portions being aligned with a corresponding one of the plurality of stripline devices.

18. The structure of claim 17 , wherein the plurality of stripline devices and the corresponding plurality of ceramic portions are disposed in an N×M rectangular away of devices, N and M being integer values greater than or equal to two (2).

19. The structure of claim 17 , wherein the surface area footprint is less than 1.0 square inches.

20. The structure of claim 17 , wherein the first major surface and the second major surface have surface areas greater than or equal to one square foot.

21. The structure of claim 16 , wherein the at least one ceramic portion is configured to cover two or more of the plurality of stripline devices.

22. The structure of claim 16 , wherein the at least one ceramic portion includes a single ceramic sheet configured to cover all of the plurality of stripline devices, the single ceramic sheet comprising or substantially comprising the first exterior layer, the second exterior layer being substantially comprised of the softboard material.

23. The structure of claim 16 , wherein the laminated panel structure is configured to be divided into the plurality of stripline devices.

24. The structure of claim 15 , wherein the at least one strip line device includes a transmission line structure.

25. The structure of claim 15 , wherein the at least one stripline device is selected from a group of stripline devices that includes a directional coupler, a balun, a power divider, and/or a power combiner.

Assignments (11)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: ANAREN, INC.
To: TTM TECHNOLOGIES INC.
Reel/Frame 056635/0640 →
SUPPLEMENT TO PATENT SECURITY AGREEMENT - ABL Recorded Apr 23, 2018
From: ANAREN, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 045998/0401 →
SUPPLEMENT TO PATENT SECURITY AGREEMENT - TL Recorded Apr 23, 2018
From: ANAREN, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046000/0815 →
RELEASE OF FIRST LIEN SECURITY INTEREST IN INTELLECTUAL PROPERTY RECORDED AT REEL/FRAME 032275/0473 Recorded Apr 18, 2018
From: CREDIT SUISSE AG, AS COLLATERAL AGENT
To: ANAREN, INC.; ANAREN MICROWAVE, INC.
Reel/Frame 045978/0510 →
RELEASE OF SECOND LIEN SECURITY INTEREST IN INTELLECTUAL PROPERTY RECORDED AT REEL/FRAME: 032276/0179 Recorded Apr 18, 2018
From: CREDIT SUISSE AG, AS COLLATERAL AGENT
To: ANAREN, INC.; ANAREN MICROWAVE, INC.
Reel/Frame 045972/0001 →
SECURITY AGREEMENT Recorded Feb 19, 2014
From: ANAREN, INC.; ANAREN MICROWAVE, INC.
To: CREDIT SUISSE AG, AS COLLATERAL AGENT (SECOND LIEN)
Reel/Frame 032276/0179 →
SECURITY AGREEMENT Recorded Feb 18, 2014
From: ANAREN, INC.; ANAREN MICROWAVE, INC.
To: CREDIT SUISSE AG, AS COLLATERAL AGENT (FIRST LIEN)
Reel/Frame 032275/0473 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2007
From: JENSEN, BO; LUGERT, MICHAEL J.; GADWAY, ADAM J.
To: ANAREN, INC.
Reel/Frame 019810/0484 →