IP Library Granted Patent US 7,087,846
Granted Patent B2
US 7,087,846 · App. 10/423,972 · Granted Aug 8, 2006

Pinned electronic package with strengthened conductive pad

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Quick Facts
Patent No.
US 7,087,846
App. No.
10/423,972
Granted
Aug 8, 2006
Kind
B2
Abstract

An electronic package and information handling system utilizing same wherein the package substrate includes an internally conductive layer coupled to an external pad to provide reinforced adhesion of the pad to the substrate to substantially prevent cracking, separation, etc. of the pad when the pad has a pin bonded thereto and the package is coupled to an external substrate (e.g., printed circuit board). The reinforced adhesion also prevents pad separation, etc. during periods of package handling, manufacture, etc.

Claims (21)

1. An electronic package comprising:

a substrate having an external surface;

an electrically conductive pad positioned on said external surface of said substrate and including a substantially planar portion and at least one indented via portion;

at least one electrically conductive layer positioned within said substrate substantially beneath said electrically conductive pad and physically coupled to said at least one indented via portion of said electrically conductive pad, said physical coupling of said at least one electrically conductive layer to said at least one via portion of said electrically conductive pad providing reinforced adhesion of said electrically conductive pad to said external surface of said substrate, the surface area of said at least one electrically conductive layer being greater than the surface area of said electrically conductive pad such that said at least one electrically conductive layer projects beyond the outer periphery of said electrically conductive pad;

an electrically conductive pin bonded to said substantially planar portion and said indented via portion of said electrically conductive pad; and

a quantity of solder, said solder bonding said electrically conductive pin to said substantially planar portion and said indented via portion of said electrically conductive pad.

2. The package of claim 1 wherein said substrate comprises an organic laminate.

3. The package of claim 1 wherein said substrate includes a plurality of layers of dielectric material and a plurality of electrically conductive layers in addition to said at least one electrically conductive layer.

4. The package of claim 1 wherein said at least one electrically conductive layer positioned within said substrate substantially beneath said electrically conductive pad and physically coupled to said at least one indented via portion of said electrically conductive pad is of a size sufficiently large enough to substantially prevent removal of said electrically conductive pad when said electrically conductive pad is subjected to a tensile load of at least about 700 grams when said electrically conductive pad has an area of about 490 mil 2 .

5. The package of claim 1 wherein said surface area of said at least one electrically conductive layer exceeds said surface area of said electrically conductive pad by at least 25 percent.

6. The invention of claim 1 further including at least one printed circuit board including at least one electrically conductive receptor thereon, said electrically conductive pin being electrically coupled to said at least one electrically conductive receptor of said at least one printed circuit board to electrically connect said electronic package to said at least one printed circuit board, said electronic package, said electrically conductive pin and said at least one printed circuit board forming an information handling system.

7. The invention of claim 6 wherein said information handling system is selected from the group of information handling systems consisting of a personal computer, server and mainframe.

8. An electronic package comprising:

a substrate having an external surface;

an electrically conductive pad positioned on said external surface of said substrate and including a substantially planar portion and at least two, spaced apart indented via portions;

at least one electrically conductive layer positioned within said substrate substantially beneath said electrically conductive pad and physically coupled to each of said at least two spaced apart indented via portions of said electrically conductive pad, said physical coupling of said at least one electrically conductive layer to said at least two spaced apart indented via portions of said electrically conductive pad providing reinforced adhesion of said electrically conductive pad to said external surface of said substrate;

an electrically conductive pin bonded to said substantially planar portion and said at least two indented via portions of said electrically conductive pad; and

a quantity of solder, said solder bonding said electrically conductive pin to said substantially planar portion and said indented via portion of said electrically conductive pad.

9. The package of claim 8 wherein the number of said indented via portions is three, said intended via portions being substantially uniformly positioned in a substantially annular orientation about said substantially planar portion.

10. The invention of claim 8 further including at least one printed circuit board including at least one electrically conductive receptor thereon, said electrically conductive pin being electrically coupled to said at least one electrically conductive receptor of said at least one printed circuit board to electrically connect said electronic package to said at least one printed circuit board, said electronic package, said electrically conductive pin and said at least one printed circuit board forming an information handling system.

11. The invention of claim 10 wherein said information handling system is selected from the group of information handling systems consisting of a personal computer, server and mainframe.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (063804/0702) Recorded Jun 2, 2026
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 075679/0852 →
PATENT SECURITY AGREEMENT (ABL) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0702 →
PATENT SECURITY AGREEMENT (TERM LOAN) Recorded May 30, 2023
From: TELEPHONICS CORPORATION; TTM TECHNOLOGIES, INC.; TTM TECHNOLOGIES NORTH AMERICA, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 063804/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2020
From: I3 ELECTRONICS, INC.
To: TTM TECHNOLOGIES NORTH AMERICA, LLC
Reel/Frame 054269/0366 →
SECURITY INTEREST Recorded Nov 14, 2016
From: I3 ELECTRONICS, INC.
To: M&T BANK
Reel/Frame 040608/0626 →