Methods of manufacturing printed circuit boards
View Patent ↗Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.
1. A method of manufacturing a printed circuit board comprising:
attaching a plurality of metal layer carriers to form a first subassembly comprising at least one copper foil pad on a first surface;
applying an encapsulation material onto the first surface of the first subassembly;
curing the encapsulation material and the first subassembly;
applying a lamination adhesive to a surface of the cured encapsulation material;
forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad;
attaching a plurality of metal layer carriers to form a second subassembly; and
attaching the first subassembly and the second subassembly.
2. The method of claim 1 , further comprising:
attaching a plurality of metal layer carriers to form a third subassembly comprising at least one copper foil pad on a first surface;
applying a second encapsulation material onto the first surface of the third subassembly;
curing the second encapsulation material and the third subassembly;
applying a second lamination adhesive to a surface of the cured second encapsulation material;
forming at least one via in the second lamination adhesive and the second cured encapsulation material to expose the at least one copper foil pad of the third subassembly; and
attaching the third subassembly and the first subassembly.
3. The method of claim 1 , wherein the forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad comprises:
drilling at least one hole in the lamination adhesive and the cured encapsulation material;
filling the at least one hole with a conductive paste.
4. The method of claim 3 , wherein the conductive paste comprises a material comprising one or more metals.
5. The method of claim 3 , wherein the conductive paste comprises a conductive ink.
6. The method of claim 1 , wherein the attaching the first subassembly and the second subassembly comprises:
aligning the at least one via with a pad on the second assembly;
attaching the first subassembly and the second subassembly using the laminate adhesive,
wherein the via and the pad are electrically coupled.
7. The method of claim 1 , wherein the via is a micro via.
8. A method of manufacturing a multi-layer printed circuit board comprising:
forming a first subassembly comprising:
(a) attaching at least one metal layer carrier to form a first subassembly comprising at least one copper foil pad on a first surface;
(b) applying an encapsulation material onto the first surface of the first subassembly;
(c) curing the encapsulation material and the first subassembly;
(d) forming at least one first via in the cured encapsulation material to expose the at least one copper foil pad;
(e) forming a conductive pattern on a surface of the cured encapsulation material, the conductive pattern including a conductive pad coupled to the at least one first via;
(f) applying a lamination adhesive to the surface of the cured encapsulation material;
(g) forming at least one hole in the lamination adhesive proximate the at least one first via;
(h) filling the at least one hole with a conductive material to form at least one second via;
repeating (a) through (e) to form a second subassembly;
attaching the first subassembly and the second subassembly such that the at least one second via of the first subassembly is about aligned with the conductive pad of the second subassembly.
9. The method of claim 8 , wherein the at least one first via of the first subassembly is a blind via, and wherein the at least one first via of the second subassembly is a blind via.
10. The method of claim 8 , wherein the at least one first via of the first subassembly is electrically coupled with the at least one first via of the second subassembly.
11. The method of claim 8 , wherein the at least one first via is about filled with copper.
12. The method of claim 8 , wherein the forming the at least one first via in the cured encapsulation material to expose the at least one copper foil pad comprises:
drilling at least one first hole in the cured encapsulation material; and
filling the at least one first hole with copper.
13. The method of claim 8 , wherein the forming the conductive pattern on the surface of the cured encapsulation material comprises forming a conductive pad on at least a portion of the first via.
14. The method of claim 8 , wherein the conductive material comprises one or more metals.
15. The structure of claim 14 , wherein the conductive material comprises a material selected from the group comprising copper and tin.
16. The method of claim 8 , wherein the conductive material comprises a conductive ink.