Granted Patent B2

US 7,470,990 · App. 11/086,323 · Granted Dec 30, 2008

Abstract

Claims (20)

1. A circuitized substrate comprising:

a first dielectric sub-layer including a low moisture absorptivity resin and a plurality of fibers having a low coefficient of thermal expansion, said first dielectric sub-layer including first and second opposing surfaces;

first and second circuitized layers located on said first and second opposing surfaces of said first dielectric sub-layer, respectively;

second and third dielectric sub-layers located on said first and second circuitized layers, respectively, each of said second and third dielectric sub-layers also of a low moisture absorptivity resin, said second and third dielectric sub-layers not including continuous or semi-continuous fibers as part thereof;

third and fourth circuitized layers positioned on said second and third dielectric sub-layers, respectively; and

a highly dense pattern of thru-holes extending through said first, second and third dielectric sub-layers and said first, second, third and fourth circuitized layers.

2. The circuitized substrate of claim 1 wherein said low moisture absorptivity resin of said second and third dielectric sub-layers comprises a high transition glass temperature thermosetting polymer.

3. The circuitized substrate of claim 2 wherein said low moisture absorptivity resin of said second and third dielectric sub-layers has less than about 0.27% moisture absorption when immersed in water for a period of about 24 hours at a temperature of about 22° C.

4. The circuitized substrate of claim 2 wherein said low moisture absorptivity resin of said second and third dielectric sub-layers comprises from about 10 to about 80 percent by weight of said second dielectric sub-layer.

5. The circuitized substrate of claim 2 wherein said low moisture absorptivity resin of said first dielectric sub-layer of said composite layer comprises a high transition glass temperature thermosetting polymer.

6. The circuitized substrate of claim 1 wherein the number of said thru-holes within said highly dense pattern is within the range of about 500 to about 10,000 per square inch.

7. The circuitized substrate of claim 1 wherein said first dielectric sub-layer has a coefficient of thermal expansion in the x and y direction less than about 15 ppm per ° C.

8. The circuitized substrate of claim 7 wherein said low moisture absorptivity resin of said first dielectric sub-layer has less than 0.27% moisture absorption when immersed in water for a period of about 24 hours at a temperature of about 22° C.

9. The circuitized substrate of claim 7 wherein said low moisture absorptivity resin of said first dielectric sub-layer comprises from about 10 to about 80 percent by weight of said first dielectric sub-layer.

10. The circuitized substrate of claim 1 wherein the aspect ratio of the thickness of said circuitized substrate to the diameter of each of said thru-holes is within the range of from about 2:1 to about 20:1.

11. The circuitized substrate of claim 1 wherein said first, second, third and fourth circuitized layers each comprising copper.

12. The circuitized substrate of claim 1 wherein said circuitized substrate comprises a chip carrier.

13. The circuitized substrate of claim 1 further including at least one electrical component positioned on and electrically coupled to said circuitized substrate, said substrate and said component being an electrical assembly.

14. The circuitized substrate of claim 13 wherein said electrical component comprises a semiconductor chip.

15. The circuitized substrate of claim 13 wherein said electrical component comprises a chip carrier.

Assignments (12)