Halogen-free circuitized substrate with reduced thermal expansion, method of making same, multilayered substrate structure utilizing same, and information handling system utilizing same
View Patent ↗A circuitized substrate including a composite layer comprising a first dielectric sub-layer comprised of a halogen-free resin and fibers dispersed therein and a second dielectric sub-layer without fibers but also including a halogen-free resin with inorganic particulates therein. A method of making such a substrate is also provided, as is a multilayered assembly including one or more such circuitized substrates, possibly in combination with other substrates. An information handling system designed for having one or more such circuitized substrates is also provided.
1. A circuitized substrate comprising:
a composite dielectric layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a halogen-free resin, and a second dielectric sub-layer of a low moisture absorptivity resin having a moisture absorption less than 0.50% when immersed in water for a period of about 24 hours at a temperature of about 22 decrees C. and a quantity of inorganic particulates, said second dielectric sub-layer not including continuous or semi-continuous fibers as part thereof; and
at least one circuitized layer positioned on said composite dielectric layer, said circuitized substrate having no flammability.
2. The circuitized substrate of claim 1 wherein said low moisture absorptivity resin of said second dielectric sub-layer of said composite dielectric layer comprises a high Tg thermosetting polymer and is also halogen-free.
3. The circuitized substrate of claim 1 wherein said quantity of inorganic particulates of said second dielectric sub-layer are comprised of silica.
4. The circuitized substrate of claim 3 wherein the particle size of said particulates are less than fifteen microns.
5. The circuitized substrate of claim 1 wherein said halogen-free resin of said first dielectric sub-layer of said composite dielectric layer is also a low moisture absorptivity resin.
6. The circuitized substrate of claim 5 wherein said low moisture absorptivity resin of said first dielectric sub-layer of said composite dielectric layer comprises a high Tg thermosetting polymer.
7. The circuitized substrate of claim 1 wherein said first dielectric sub-layer of said composite dielectric layer has a coefficient of thermal expansion in the x and y direction less than about seventeen ppm per degree C.
8. The circuitized substrate of claim 1 wherein said plurality of fibers of said first dielectric sub-layer having a low coefficient of thermal expansion are p-aramid fibers in the form of a matte.
9. The circuitized substrate of claim 8 wherein said p-aramid fibers in the form of said matte have a dielectric constant of about 3.4.
10. The circuitized substrate of claim 1 wherein said first and second dielectric sub-layers of said composite dielectric layer each include a plurality of thru-holes therein, the aspect ratio of the thickness of said circuitized substrate to the diameter of each of said thru-holes being within the range of from about 2:1 to about 20:1.
11. The circuitized substrate of claim 1 wherein said at least one circuitized layer is comprised of copper.
12. The circuitized substrate of claim 1 further including a second circuitized layer positioned on said composite dielectric layer on a side opposite said at least one circuitized layer.
13. The circuitized substrate of claim 12 further including second and third dielectric layers positioned on said at least one circuitized layer and said second circuitized layer, respectively, and third and fourth circuitized layers formed on said second and third dielectric layer, respectively.
14. The invention of claim 13 wherein said circuitized substrate comprises a chip carrier.
15. The circuitized substrate of claim 1 further including at least one electrical component positioned on and electrically coupled to said circuitized substrate, said circuitized substrate and said at least one electrical component forming a circuitized substrate assembly.
16. The circuitized substrate of claim 15 wherein said electrical component comprises a semiconductor chip.
17. The circuitized substrate of claim 15 wherein said electrical component comprises a chip carrier.
18. The circuitized substrate of claim 1 wherein said first dielectric sub-layer of said composite dielectric layer has no more than 0.27% moisture absorption when the sub-layer is immersed in water for a period of about 24 hours at a temperature of about 22 degrees C.
19. A multilayered circuitized structure comprising:
a first circuitized substrate portion including a composite dielectric layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a halogen-free resin, and a second dielectric sub-layer of a low moisture absorptivity resin having a moisture absorption less than 0.50% when immersed in water for a period of about 24 hours at a temperature of about 22 degrees C. and a quantity of inorganic particulates, said second dielectric sub-layer not including continuous or semi-continuous fibers as part thereof, and at least one circuitized layer positioned on said composite dielectric layer; and
second and third circuitized substrate portions positioned on opposite sides of said first circuitized substrate portion, each having a second pattern of interconnecting thru-holes therein, said first circuitized substrate portion providing electrical interconnection between said second and third circuitized substrate portions, including interconnecting selected ones of said thru-holes in said second circuitized substrate portion with corresponding thru-holes within said third circuitized substrate portion, said multilayered circuitized structure having no flammability.
20. A method of making a circuitized substrate, said method comprising: providing a composite dielectric layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a halogen-free resin, and a second dielectric sub-layer of a low moisture absorptivity resin, having a moisture absorption less than 0.50% when immersed in water for a period of about 24 hours at a temperature of about 22 degrees C.
and a quantity of inorganic particulates, said second dielectric sub-layer not including continuous or semi-continuous fibers as part thereof; and providing at least one circuitized layer on said composite dielectric layer, said circuitized substrate having no flammability.
21. The method of claim 20 further including providing in said first and second dielectric sub-layers a plurality of thru-holes each having an aspect ratio of the thickness of said composite layer of said circuitized substrate to the diameter of said thru-hole within the range of from about 2:1 to about 20:1.
22. The method of claim 21 wherein said each of said plurality of thru-holes are provided within said first and second sub-layers using a laser.
23. The method of claim 20 wherein said first and second dielectric sub-layers are laminated together.
24. The method of claim 20 further including providing second and third dielectric layers on opposite sides of said composite dielectric layer, respectively, and second and third circuitized layers formed on said second and third dielectric layers, respectively.
25. The method of claim 24 further including electrically coupling at least one electrical component to said second circuitized layer or said third circuitized layer.
26. The multilayered circuitized structure of claim 19 wherein said first dielectric sub-layer of said composite dielectric layer has no more than 0.27% moisture absorption when the sub-layer is immersed in water for a period of about 24 hours at a temperature of about 22 degrees C.
27. The invention of claim 19 wherein said multilayered circuitized structure comprises a printed circuit board.
28. The invention of claim 19 wherein said multilayered circuitized structure comprises a chip carrier.
29. The multilayered circuitized structure of claim 28 further including at least one semiconductor chip positioned on or within said chip carrier and forming part thereof.
30. An information handling system comprising: a housing; a circuitized substrate positioned substantially within said housing and including a composite dielectric layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a halogen-free resin, and a second dielectric sub-layer of a low moisture absorptivity resin, having a moisture absorption less than 0.50% when immersed in water for a period of about 24 hours at a temperature of about 22 degrees C. and a quantity of inorganic particulates, said second dielectric sub-layer not including continuous or semi-continuous fibers as part thereof and at least one electrical component positioned on and electrically coupled to said circuitized substrate, said circuitized substrate having no flammability.
31. The invention of claim 30 wherein said information handling system comprises a personal computer.
32. The invention of claim 30 wherein said information handling system comprises a mainframe computer.
33. The invention of claim 30 wherein said information handling system comprises a computer server.