Method and structure for a large-grain high-K dielectric
A method of forming a semiconductor device ( 100 ) includes depositing a metal oxide ( 104 ) over the substrate ( 102 ). The depositing includes combining a first metal and oxygen to form the metal oxide having grains and further adding a catalyst during the combining. The catalyst causes the grains to be bigger than would occur in the absence of the catalyst. A conductive layer ( 202 ) is formed over the metal oxide.
1. A method of forming a semiconductor device using a substrate, comprising:
depositing a metal oxide over the substrate, the depositing comprising combining a first metal and oxygen to form the metal oxide having grains and further adding a catalyst during the combining, wherein the catalyst causes the grains to be bigger than would occur in the absence of the catalyst; and
forming a conductive layer over the metal oxide, the conductive layer comprising a second metal different from the first metal.
2. The method of claim 1 , wherein the first metal comprises hafnium.
3. The method of claim 2 , wherein the catalyst comprises nickel.
4. The method of claim 3 , wherein a concentration of the hafnium in the metal oxide exceeds a concentration of the nickel in the metal oxide by at least a factor of ten thousand.
5. The method of claim 1 , wherein the first metal has a first concentration in the metal oxide and the catalyst has a second concentration in the metal oxide, wherein the first concentration is at least 10 thousand times greater than the second concentration.
6. The method of claim 1 , wherein the combining the first metal and the oxygen comprises combining a precursor comprising the first metal with water.
7. The method of claim 6 , wherein the water is further characterized as being heavy water.
8. The method of claim 1 , wherein the grains have an average lateral dimension, further comprising:
patterning the conductive layer to form a gate having a gate length, wherein the gate length is less than the average lateral dimension.
9. The method of claim 8 , wherein the average lateral dimension is at least four times greater than the gate length.
10. The method of claim 1 wherein:
the first metal comprises hafnium; and
the catalyst comprises one of a group consisting of nickel, platinum, iron, and germanium.
11. The method of claim 10 , wherein the adding a catalyst comprises adding a precursor that comprises components additional to the one of the group consisting of nickel, platinum, iron, and germanium.
12. The method of claim 1 , wherein the depositing is further characterized as performing atomic layer deposition of a plurality of layers wherein at least one layer of the plurality of layers comprises the catalyst and at least one layer of the plurality of layers is free of the catalyst.
13. A method of forming a semiconductor device using a substrate, comprising:
using atomic layer deposition to form a first layer over the substrate, wherein the first layer comprises a first metal and oxygen; and
using atomic layer deposition to form a second layer over the substrate, wherein the second layer comprises the first metal, oxygen, and a catalyst, wherein the catalyst comprises one of a group consisting of nickel, platinum, iron, and germanium; and
forming a conductive layer over the second layer, the conductive layer comprising a second metal different from the first metal.
14. The method of claim 13 , wherein:
the first metal comprises hafnium; and
the catalyst comprises nickel.