IP Library Granted Patent US 9,836,073
Granted Patent B2
US 9,836,073 · App. 14/582,269 · Granted Dec 5, 2017

Current source, an integrated circuit and a method

Inventors: Gerhard Trauth (Muret, FR); Emil Cozac (Balma, FR); Yean Ling Teo (Goyrans, FR)
Assignee: NXP USA, Inc.
G05F3/02H03F1/0211H03K5/2472H03K5/2481H03F2200/504
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Quick Facts
Patent No.
US 9,836,073
App. No.
14/582,269
Granted
Dec 5, 2017
Kind
B2
Abstract

The present invention provides a current source comprising a first bias current control element, the first bias current control element being configured to generate a first current if the control value is lower than a reference value and configured to generate a second current if the control value equal to or higher than the reference value. In addition or alternatively the bias current source comprises a second bias current control element, the second bias current control element being configured to generate a third current if the control value is lower than or equal to the reference value and configured to generate a fourth current if the control value is higher than the reference value. Furthermore, the present invention provides an integrated circuit and a method.

Claims (58)

1. A bias current source, comprising:

a bias current path between a high power supply node and a low power supply node, for providing a bias current flowing from the high power supply node to the low power supply node;

a first control input for receiving a control signal; and

a bias current control circuit in the bias current path and connected to the first control input, the bias current control circuit controlling, when the bias current source is in operation, the bias current as a function of the difference between a control value of a predetermined parameter of the control signal and a reference value,

said bias current decreasing in at least one of ranges (a) or (b) when the absolute value of the difference increases, range (a) being the range in which the difference is positive and range (b) being the range in which the difference is negative;

the bias current control circuit comprises a first bias current control element and a second bias current control element in the bias current path, each having a controllable device and a voltage follower, the voltage follower comprising:

a current source;

a first transistor connected with a first current terminal to the current source and to a control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the control voltage control input; and

a second transistor connected with a first current terminal to the current source and to the control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the reference voltage input;

the first and second transistors in the voltage follower of the first bias control element are of a first conductivity type, and first and second transistors in the voltage follower of the second bias control element are of a second conductivity type opposite to the first conductivity type;

the controllable device of the first bias current control element comprises a transistor of the second conductivity type; and

the controllable device of the second bias current control element comprises a transistor of the first conductivity type.

2. A bias current source as claimed in claim 1 , wherein, when the bias current source is in operation, the bias current is monotonically decreasing when the absolute value of the difference increases in one of (a) or (b) and constant as a function of the difference when said absolute value exceeds a predetermined saturation value in the other one of (a) and (b).

3. A bias current source as claimed in claim 1 , wherein in both ranges (a) and (b), said bias current is constant when said absolute value exceeds a predetermined saturation value, is monotonically decreasing as a function of the difference when said absolute value is between the saturation value and zero, and the bias current has a maximum when said absolute value is negligible.

4. A bias current source as claimed in claim 2 , wherein the constant bias current is larger than zero.

5. The bias current source of claim 1 , comprising a second control input for receiving the reference value.

6. The bias current source as claimed in claim 5 , wherein the first control input is a control current input for receiving a control current and the second control input is a reference current input for receiving a reference current, and the bias current control circuit controls, when the bias current source is in operation, the bias current as a function of the difference between the control current and the reference current, said function decreasing when the absolute value of said difference increases.

7. The bias current source as claimed in claim 5 , wherein the first control input is a control voltage input for receiving a control voltage and the second control input is a reference voltage input for receiving a reference voltage, and the bias current control circuit controls, when the bias current source is in operation, the bias current as a function of the difference between the control voltage and the reference voltage, said function decreasing when the absolute value of said difference increases.

8. A bias current source as claimed in claim 1 , wherein the first bias current control element and the second bias current control element each have a variable impedance;

the first bias current control element presenting a first variable impedance in the bias current path which varies, when the bias current source is in operation, as a monotonic increasing function of said control value if said difference is smaller than zero; and

the second bias current control element presenting a second variable impedance in the bias current path which varies, when the bias current source is in operation, as a monotonic decreasing function of said control value if said difference is larger than zero.

9. A bias current source as claimed in claim 8 , wherein the first bias current control element and the second bias element are connected in series.

10. The bias current source as claimed in claim 8 , wherein the controllable device of the first bias current control element and the controllable device of the second bias current control element each comprise a first current terminal and a second current terminal, and a control terminal for controlling current flowing between the first current terminal and the second current terminal, and the bias current control circuit comprises at least one of a first control circuit and a second control circuit, the first bias control element connected to the control terminal of the controllable device of the first bias current control element and a second bias control element connected to the control terminal of the controllable device of the second bias current control element.

11. The bias current source as claimed in claim 1 , wherein the current source in the voltage follower of at least one of the first bias control element and the second bias control element comprises a current mirror which provides, when the bias current source is in operation, to the first transistor a current and the first transistor of the other one of the first bias control element and the second bias control element a copied current which is a copy of the current to the first transistor.

12. A threshold detector, comprising:

a detector input for receiving an input signal;

an output for outputting a signal indicating whether or not a value of a predetermined parameter of the input signal exceeds a threshold value;

a bias input;

a bias current source connected with a first control input to the detector input, and with at least one of the high power supply node and a low power supply node to the bias input, the bias current source comprising:

a bias current path between the high power supply node and the low power supply node, the bias current path to provide a bias current flowing from the high power supply node to the low power supply node;

a first control input to receive a control signal; and

a bias current control circuit in the bias current path and connected to the first control input, the bias current control circuit to control, when the bias current source is in operation, the bias current as a function of the difference between a control value of a predetermined parameter of the control signal and a reference value,

said bias current monotonically decreasing from a maximum value to a minimum value when the absolute value of the difference increases and during at least one of: when the difference is positive; and when the difference is negative, wherein the bias current is at the maximum value when the control value equals the reference value, and is at the minimum value when the absolute value of the difference is at a threshold value;

the bias current control circuit comprises a first bias current control element and a second bias current control element in the bias current path, each having a controllable device and a voltage follower, the voltage follower comprising:

a current source;

a first transistor connected with a first current terminal to the current source and to a control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the control voltage control input; and

a second transistor connected with a first current terminal to the current source and to the control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the reference voltage input;

the first and second transistors in the voltage follower of the first bias control element are of a first conductivity type, and first and second transistors in the voltage follower of the second bias control element are of a second conductivity type opposite to the first conductivity type;

the controllable device of the first bias current control element comprises a transistor of the second conductivity type; and

the controllable device of the second bias current control element comprises a transistor of the first conductivity type.

13. The threshold detector as claimed in claim 12 , comprising a bias current mirror connected between the bias current source and the bias input, for providing to the bias input a current which comprises a copy of the bias current provided by the bias current source.

14. The threshold detector as claimed in claim 12 , comprising a state retention current source connected to the bias input, for providing a state retention current sufficient to maintain the state of the threshold detector, the bias input receiving both the state retention current and the bias current from the current source.

15. The threshold detector as claimed in claim 14 , comprising a state retention current mirror connected to the bias input and the state retention current source, for providing to the bias input a current which is a copy of the state retention current.

16. An integrated circuit, comprising at least one of a bias current source as claimed in claim 1 and an electronic circuit comprising a bias input connected to the bias current source.

17. A method comprising:

providing, via a bias current path between a high power supply node and a low power supply node, a bias current flowing from the high power supply node to the low power supply node;

receiving, at a first control input, a control signal; and

controlling, by a bias current control circuit, when a bias current source is in operation, the bias current as a function of a difference between a control value of a predetermined parameter of the control signal and a reference value, wherein the bias current monotonically decreases from a maximum value to a minimum value when the absolute value of the difference increases and during at least one of: when the difference is positive; and when the difference is negative, wherein the bias current is at the maximum value when the control value equals the reference value, and is at the minimum value when the absolute value of the difference is at a threshold value, wherein

the bias current control circuit comprises a first bias current control element and a second bias current control element in the bias current path, each having a controllable device and a voltage follower, the voltage follower

comprising

a current source;

a first transistor connected with a first current terminal to the current source and to a control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the control voltage control input; and

a second transistor connected with a first current terminal to the current source and to the control input of the controllable device, with a second current terminal to a respective one of the high power supply node and the low power supply node and with a control input to the reference voltage input;

the first and second transistors in the voltage follower of the first bias control element are of a first conductivity type, and first and second transistors in the voltage follower of the second bias control element are of a second conductivity type opposite to the first conductivity type;

the controllable device of the first bias current control element comprises a transistor of the second conductivity type, and

the controllable device of the second bias current control element comprises a transistor of the first conductivity type.

18. The threshold detector of claim 12 , wherein the constant bias current is larger than zero.

19. The threshold detector of claim 12 , comprising a second control input for receiving the reference value.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0535 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0444 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037358/0001 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0923 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035034/0019 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2014
From: TRAUTH, GERHARD; COZAC, EMIL; TEO, YEAN LING
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 034582/0236 →
Priority Claims (1)
WO PCT/IB2014/001602 · Jul 24, 2014 · international
Continuity (1)
Related Publication 20160026203A1 · Jan 28, 2016