Systems, apparatuses, and methods for data speculation execution
Systems, methods, and apparatuses for data speculation execution (DSX) are described. In some embodiments, a hardware apparatus for performing DSX comprises a hardware decoder to decode an instruction, the instruction to include an opcode, and execution hardware to execute the decoded instruction to reset data speculative execution (DSX) tracking hardware to track speculative memory accesses, clear a DSX status indication in a DSX status register, and commit all speculatively executed stores of the DSX region and thereby end a DSX region.
1. An apparatus comprising:
a hardware decoder to decode an instruction, the instruction to include an opcode and a data speculative execution (DSX) status register operand; and
execution hardware to execute the decoded instruction to reset DSX tracking hardware to track speculative memory accesses, clear a DSX status indication in a DSX status register, and commit all speculatively executed stores of the DSX region and thereby end a DSX region.
2. The apparatus of claim 1 , wherein the execution hardware to determine that a DSX is active prior to ending the DSX region.
3. The apparatus of claim 1 , wherein the execution hardware to determine that a DSX is not active and generate a fault.
4. The apparatus of claim 1 , wherein the execution hardware to further to determine that an restricted transactional memory (RTM) transaction is occurring and end the RTM transaction.
5. The apparatus of claim 1 , further comprising:
a DSX nesting counter to store a value corresponding to a number of DSX region starts with no corresponding DSX region ends.
6. The apparatus of claim 1 , wherein the execution hardware to determine a value of the DSX nesting counter is equal to zero and perform no operation.
7. A method comprising:
decoding an instruction using a hardware decoder, the instruction to include an opcode and an operand to store a portion of a fallback address and operand to store a stride value; and
executing the decoded instruction to reset data speculative execution (DSX) tracking hardware to track speculative memory accesses, clear a DSX status indication in a DSX status register, and commit all speculatively executed stores of the DSX region and thereby end a DSX region.
8. The method of claim 7 , wherein the instruction to include a DSX status register operand.
9. The method of claim 7 , further comprising:
determining that a DSX is active prior to ending the DSX region.
10. The method of claim 7 , further comprising:
determining that a DSX is not active and generate a fault.
11. The method of claim 7 , further comprising:
determining that an restricted transactional memory (RTM) transaction is occurring and end the RTM transaction.
12. The method of claim 7 , further comprising:
storing a value corresponding to a number of DSX region starts with no corresponding DSX region ends.
13. The method of claim 7 , further comprising:
determining the value of a DSX nesting counter is equal to zero and perform no operation.
14. A non-transitory machine readable medium storing instructions which when executed by a machine cause circuitry to be fabricated, the circuitry comprising:
a hardware decoder to decode an instruction, the instruction to include an opcode and a data speculative execution (DSX) status register operand; and
execution hardware to execute the decoded instruction to reset DSX tracking hardware to track speculative memory accesses, clear a DSX status indication in a DSX status register, and commit all speculatively executed stores of the DSX region and thereby end a DSX region.
15. The non-transitory machine readable medium of claim 14 , wherein the instruction to include a DSX status register operand.
16. The non-transitory machine readable medium of claim 14 , wherein the execution hardware to determine that a DSX is active prior to ending the DSX region.
17. The non-transitory machine readable medium of claim 14 , wherein the execution hardware to determine that a DSX is not active and generate a fault.