Semiconductor package and fabrication method thereof and carrier structure
A carrier structure is provided, which includes: a metal oxide plate having opposite first and second surfaces and a plurality of through holes penetrating the first and second surfaces; a plurality of conductive portions formed in the through holes, respectively; and a plurality of conductive pads formed on the first surface of the metal oxide plate, wherein each of the conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions. By replacing a conventional silicon interposer with the metal oxide plate, the present invention eliminates the need to form through silicon vias as required in the prior art and therefore simplifies the fabrication process.
1. A semiconductor package, comprising:
a metal oxide plate having opposite first and second surfaces and a plurality of first through holes penetrating the first and second surfaces;
a plurality of conductive portions formed in the first through holes, respectively;
a plurality of first conductive pads formed on the first surface of the metal oxide plate, wherein each of the first conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions;
at least a semiconductor element disposed on the first surface of the metal oxide plate and electrically connected to the first conductive pads through a plurality of conductive bumps; and
an underfill formed between the semiconductor element and the first conductive pads and completely encapsulating the conductive bumps.
2. The package of claim 1 , wherein the metal oxide plate is an aluminum oxide plate.
3. The package of claim 1 , wherein the first through holes are arranged in clusters.
4. The package of claim 1 , wherein a plurality of second through holes are formed in the metal oxide plate and penetrating the first and second surfaces of the metal oxide plate.
5. The package of claim 4 , wherein the first and second through holes are regularly arranged.
6. The package of claim 4 , wherein the second through holes are positioned between the first conductive pads.
7. The package of claim 4 , further comprising a dielectric material formed in the second through holes.
8. The package of claim 1 , further comprising an insulating layer formed on the first surface of the metal oxide plate and exposing the first conductive pads.
9. The package of claim 1 , further comprising an encapsulant formed on the first surface of the metal oxide plate for encapsulating the semiconductor element.
10. The package of claim 1 , further comprising a plurality of second conductive pads formed on the second surface of the metal oxide plate, wherein each of the second conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions.
11. A method for fabricating a semiconductor package, comprising the steps of:
providing a metal oxide plate having opposite first and second surfaces and a plurality of first through holes penetrating the first and second surfaces;
forming a conductive material in each of the first through holes so as to form a plurality of conductive portions;
forming a plurality of first conductive pads on the first surface of the metal oxide plate, wherein each of the first conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions;
disposing at least a semiconductor element on the first surface of the metal oxide plate, wherein the semiconductor element is electrically connected to the first conductive pads through a plurality of conductive bumps; and
forming an underfill between the semiconductor element and the first conductive pads for completely encapsulating the conductive bumps.
12. The method of claim 11 , wherein the metal oxide plate is fabricated by performing an oxidation-reduction process on a metal plate so as to form the first through holes in the metal plate when the metal plate is oxidized.
13. The method of claim 11 , wherein the metal oxide plate is an aluminum oxide plate.
14. The method of claim 11 , wherein the first through holes are arranged in clusters.
15. The method of claim 11 , wherein the metal oxide plate further has a plurality of second through holes penetrating the first and second surfaces.
16. The method of claim 15 , wherein the first and second through holes are regularly arranged.
17. The method of claim 15 , wherein the second through holes are positioned between the first conductive pads.
18. The method of claim 15 , further comprising forming a dielectric material in the second through holes.
19. The method of claim 11 , further comprising forming an insulating layer on the first surface of the metal oxide plate, wherein the first conductive pads are exposed from the insulating layer.
20. The method of claim 11 , further comprising forming an encapsulant on the first surface of the metal oxide plate for encapsulating the semiconductor element.
21. The method of claim 11 , further comprising forming a plurality of second conductive pads on the second surface of the metal oxide plate, wherein each of the second conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions.
22. The method of claim 11 , after disposing the semiconductor element on the first surface of the metal oxide plate, further comprising performing a singulation process.