Metal gate finFET device
A device including a substrate having a fin. A metal gate structure is formed on the fin. The metal gate structure includes a stress metal layer formed on the fin such that the stress metal layer extends to a first height from an STI feature, the first height being greater than the fin height. A conduction metal layer is formed on the stress metal layer.
1. A device, comprising:
a substrate having a first and second fin, wherein the fins are interposed by a shallow trench isolation (STI) feature, and wherein the first fin extends a first height above a surface of the STI feature and terminates in a first fin top surface;
a first metal layer formed on the first and second fins, wherein the first metal layer is formed on the sidewalls of each of the first and second fins and extends above the first fin top surface at a region directly above the STI feature, wherein the first metal layer has a uniform composition;
a second metal layer formed on the first metal layer, wherein a thickness of the first metal layer disposed on the STI feature is greater than the first height and a thickness of the first metal layer disposed on the first fin is less than a thickness of the second metal layer disposed on the first fin; and
wherein the second metal layer is formed coextensively with and directly on the first metal layer.
2. The device of claim 1 , wherein the first metal layer is formed on a gate dielectric layer.
3. The device of claim 1 , wherein the first metal layer applies a stress to a channel region of the first and second fins.
4. The device of claim 1 , wherein the first metal layer includes a metal selected from the group consisting of W, TiN, TaN, WN, Re, Ir, Ru, Mo, and combinations thereof.
5. The device of claim 1 , wherein the first metal layer is formed directly on a gate dielectric layer.
6. The device of claim 1 , wherein the second metal layer includes a metal selected from the group consisting of Al, Cu, CO, Ni, and combinations thereof.
7. The device of claim 1 , wherein the second metal layer has a planar bottom surface.
8. A device, comprising:
a substrate having first and second fins, wherein the first and second fins are interposed by an isolation feature;
a first metal layer formed on the first and second fins, wherein the top surface of the first metal layer above each of the first fin, the isolation feature, and the second fin is coplanar;
a second metal layer formed on the first metal layer, wherein the first metal layer includes a nitride of a metal element and the metal element is not included in the second metal layer; and
wherein the second metal layer is formed coextensively with and directly on the first metal layer.
9. The device of claim 8 , wherein the isolation feature is a shallow trench isolation (STI) feature extending from a sidewall of the first fin to a sidewall of the second fin.
10. The device of claim 8 , wherein the first and second fins include silicon.
11. The device of claim 8 , further comprising:
an interfacial layer on the first and second fins; and
a gate dielectric layer on the interfacial layer and underlying the first metal layer.
12. The device of claim 8 , wherein the first metal layer includes WN and provides a stress to a channel region of the first fin.
13. The device of claim 8 , wherein the first metal layer is TiN having a Young's modulus of approximately 251-550 GPa and provides a stress to a channel region of the first fin.
14. A device, comprising:
a substrate having a first and second fin, wherein the fins are interposed by a shallow trench isolation (STI) feature, and wherein the first fin and the second fin each extend a first height above a surface of the STI feature; and
a gate structure including:
a first metal layer formed on the first and second fins and over the STI feature, wherein the first metal layer has a first thickness over the STI feature and a second thickness over the fins;
a second metal layer formed on the first metal layer and having a third thickness over the fins, wherein the first thickness is greater than the first height and the second thickness is less than the third thickness, wherein the second metal layer is a metal that is not included in the first metal layer; and
wherein the second metal layer is formed coextensively with and directly on the first metal layer.
15. The device of claim 14 , wherein the first metal layer is formed directly on a gate dielectric layer disposed on the first and second fins.
16. The device of claim 14 , wherein the first metal layer applies a stress to a channel region disposed the first fin.
17. The device of claim 14 , wherein the first metal layer includes one of W, TiN, WN, TaN, and Mo.
18. The device of claim 14 , wherein the second metal layer is formed directly on the first metal layer.
19. The device of claim 14 , wherein the second metal layer includes a metal selected from the group consisting of Al, Cu, CO, and combinations thereof.
20. The device of claim 14 , wherein the second metal layer has a planar bottom surface and a planar top surface.