IP Library Granted Patent US 9,089,027
Granted Patent B2
US 9,089,027 · App. 14/598,695 · Granted Jul 21, 2015

LED display systems

Inventors: Eric Li (Milpitas, CA); Chun Lu (San Jose, CA); Shahnad Nadershahi (Simi Valley, CA); Shang-Kuan Tang (Fremont, CA)
Assignee: SCT TECHNOLOGY, LTD.
H05B33/0818G09G3/32G09G3/3216G09G3/3283G09G3/3406G09G3/3413G09G3/3426G09G5/10H05B33/0857G09G3/2018G09G2320/029G09G2320/0242G09G2320/0257G09G2320/0285G09G2320/062G09G2320/064G09G2320/0666G09G2330/06
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,089,027
App. No.
14/598,695
Granted
Jul 21, 2015
Kind
B2
Abstract

An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a series of gain adjustable fast charge current sources, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.

Claims (14)

1. A driver circuit for LEDs, comprising:

a phase lock loop;

a pulse width modulation engine;

a configuration register;

a gain adjustable fast charge current source;

a DOT correction adjustment means for adjusting an output current to an LED; and

a serial input/output interface,

wherein the phase lock loop, operatively connected to the serial input/output interface, provides a global clock signal,

wherein the pulse width modulation engine, operatively connected to the serial input/output interface, receives gray scale values from the serial input/output interface and the global clock signal from the phase lock loop, and generates a PWM signal for the gain adjustable fast charge current source,

wherein the configuration register, operatively connected to the serial input/output interface and the gain adjustable fast charge current source, stores driver circuit settings,

wherein the gain adjustable fast charge current source, operatively connected to the configuration register, the serial input/output interface, and the pulse width modulation engine, provides a current output to drive an LED array, and

wherein the serial input/output interface, operatively connected to the phase locked loop, the configuration register, the pulse width modulation engine, and the gain adjustable fast charge current sources, provides driver circuit settings to the configuration register, provides gray scale values to the pulse width modulation engine, and provides global gain adjustment settings to the gain adjustable fast charge current source.

2. The driver circuit according to claim 1 , further comprising a sink current return circuit for receiving a current from the LED array.

3. The driver circuit according to claim 1 , further comprising an error detection circuit, wherein the error detection circuit monitors a voltage drop across a LED.

Assignments (3)
LICENSE Recorded Sep 17, 2023
From: SILICONCORE TECHNOLOGY, INC.
To: SEOUL SEMICONDUCTOR CO., LTD.
Reel/Frame 064929/0302 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2018
From: SCT TECHNOLOGY, LTD.
To: SCT LTD.
Reel/Frame 046422/0356 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2015
From: LI, ERIC; LU, CHUN; NADERSHAHI, SHAHNAD; TANG, SHANG-KUAN
To: SCT TECHNOLOGY, LTD.
Reel/Frame 035839/0868 →
Continuity (3)
Continuation 13237960 · Sep 21, 2011
Continuation In Part 13170181 · Jun 27, 2011
Related Publication 20150123555A1 · May 7, 2015