Method and system for a GaN vertical JFET utilizing a regrown channel
View Patent ↗A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region.
1. A method for fabricating a vertical JFET, the method comprising:
providing a gallium nitride (GaN) substrate;
forming an n-type GaN epitaxial layer coupled to the GaN substrate;
forming a p-type GaN epitaxial layer coupled to the n-type GaN epitaxial layer, wherein the p-type GaN epitaxial layer is characterized by a p-type dopant concentration;
removing at least a portion of the p-type GaN epitaxial layer to expose a portion of the n-type GaN epitaxial layer;
forming an n-type GaN channel region coupled to the n-type GaN epitaxial layer and at least a portion of the p-type GaN epitaxial layer;
forming an n-type GaN epitaxial structure coupled to the n-type GaN channel region;
forming a first metallic structure electrically coupled to the GaN substrate;
forming a second metallic structure electrically coupled to the p-type GaN epitaxial layer; and
forming a third metallic structure electrically coupled to the n-type GaN epitaxial structure.
2. The method of claim 1 wherein a thickness of the n-type GaN epitaxial layer is between about 1 μm and about 100 μm.
3. The method of claim 2 wherein a thickness of the n-type GaN channel region is greater than a thickness of the p-type GaN epitaxial layer.
4. The method of claim 1 wherein the n-type GaN epitaxial layer is characterized by a first n-type dopant concentration, the n-type GaN channel region is characterized by a second n-type dopant concentration, and the n-type GaN epitaxial structure is characterized by a third n-type dopant concentration greater than the first n-type dopant concentration.
5. The method of claim 4 wherein at least one of the first n-type dopant concentration, the second n-type dopant concentration, or the third n-type dopant concentration varies as a function of thickness.
6. The method of claim 1 wherein the n-type GaN epitaxial layer comprises an n-type dopant including at least one of silicon and oxygen.
7. A method for fabricating an epitaxial structure, the method comprising:
providing a III-nitride substrate;
forming a first III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate, wherein the first III-nitride epitaxial layer has a first dopant concentration;
forming a second III-nitride epitaxial layer of a second conductivity type coupled to the first III-nitride epitaxial layer, wherein the second III-nitride epitaxial layer has a second dopant concentration;
removing at least a portion of the second III-nitride epitaxial layer to expose a surface of the first III-nitride epitaxial layer;
forming a III-nitride epitaxial channel region of the first conductivity type coupled to the surface of the first III-nitride epitaxial layer, wherein the III-nitride epitaxial channel region has a third dopant concentration; and
forming a III-nitride epitaxial structure of the first conductivity type coupled to the III-nitride epitaxial channel region, the III-nitride epitaxial structure having a dopant concentration greater than the first dopant concentration.
8. The method of claim 7 further comprising forming a metallic structure in contact with the III-nitride substrate.
9. The method of claim 7 further comprising forming a metallic structure in contact with the second III-nitride epitaxial layer.
10. The method of claim 7 further comprising forming a metallic structure in contact with the III-nitride epitaxial structure.
11. The method of claim 7 wherein the first conductivity type is n type, and the second conductivity type is p type.
12. The method of claim 7 wherein at least one of the first dopant concentration, the second dopant concentration, or the third dopant concentration is non-uniform.
13. The method of claim 7 wherein a thickness of the first III-nitride epitaxial layer is between 1 μm and 100 μm.