IP Library Granted Patent US 9,589,936
Granted Patent B2
US 9,589,936 · App. 14/619,002 · Granted Mar 7, 2017

3D integration of fanout wafer level packages

Inventors: Jun Zhai (Cupertino, CA); Kunzhong Hu (Cupertino, CA); Flynn P. Carson (Redwood City, CA)
Assignee: Apple Inc.
H01L25/0657H01L21/4853H01L21/561H01L21/565H01L21/568H01L23/3135H01L23/49811H01L23/49838H01L23/525H01L23/552H01L24/19H01L24/89H01L24/96H01L24/97H01L25/03H01L25/50H01L2224/04105H01L2224/12105H01L2224/16227H01L2224/73204H01L2224/80001H01L2224/97H01L2225/0652H01L2225/06572H01L2924/15311H01L2924/18161H01L2924/18162H01L2924/19105
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Quick Facts
Patent No.
US 9,589,936
App. No.
14/619,002
Granted
Mar 7, 2017
Kind
B2
Abstract

Fanout wafer level packages (FOWLPs) and methods of formation are described. In an embodiment, a package includes a first routing layer, a first die on a top side of the first routing layer, and a first molding compound encapsulating the first die on the first routing layer. A first plurality of conductive pillars extends from a bottom side of the first routing layer. A second die is on a top side of a second routing layer, and the first plurality of conductive pillars is on the top side of the routing layer. A second molding compound encapsulates the first molding compound, the first routing layer, the first plurality of conductive pillars, and the second die on the second routing layer. In an embodiment, a plurality of conductive bumps (e.g. solder balls) extends from a bottom side of the second routing layer.

Claims (32)

1. A package comprising:

a first routing layer including a first redistribution line;

a first die including a first contact pad, wherein the first die is located on a top side of the first routing layer and the first redistribution line is formed directly on the first contact pad;

a first molding compound encapsulating the first die on the first routing layer;

a first plurality of conductive pillars extending from a bottom side of the first routing layer;

a second routing layer, wherein the first plurality of conductive pillars is on a top side of the second routing layer;

a second die on a top side of the second routing layer; and

a second molding compound encapsulating the first molding compound, the first routing layer, the first plurality of conductive pillars, and the second die on the second routing layer.

2. The package of claim 1 , wherein the first molding compound does not cover the top side of the first die.

3. The package of claim 1 , wherein the second molding compound covers the top side of the first die.

4. The package of claim 1 , wherein the first die is directly over the second die.

5. The package of claim 1 , wherein the first plurality of conductive pillars is taller than the second die.

6. The package of claim 1 , further comprising a plurality of first die on the top side of the first routing layer and encapsulated by the first molding compound.

7. The package of claim 1 , further comprising a plurality of second die on the top side of the second routing layer and encapsulated by the second molding compound.

8. The package of claim 1 , further comprising one or more passive elements encapsulated by the second molding compound.

9. The package of claim 1 , further comprising conductive bumps on a bottom side of the second routing layer.

10. The package of claim 1 , further comprising:

a second plurality of conductive pillars extending from a bottom side of the second routing layer;

a third routing layer, wherein the second plurality of conductive pillars is on a top side of the third routing layer; and

a third die on the top side of the third routing layer.

11. The package of claim 10 , further comprising a third molding compound encapsulating the second molding compound, the second routing layer, the second plurality of conductive pillars, and the third die on the third routing layer.

12. The package of claim 11 , further comprising a plurality of conductive bumps on a bottom side of the third routing layer.

13. The package of claim 1 , wherein the second molding compound laterally surrounds the first molding compound.

14. The package of claim 13 , wherein the second molding compound laterally surrounds the first routing layer and the first plurality of conductive pillars.

15. The package of claim 1 , wherein:

the second die includes a second contact pad; and

the second routing layer includes a second redistribution line formed directly on the second contact pad.

16. The package of claim 15 , wherein the second molding compound laterally surrounds the first routing layer and the first plurality of conductive pillars.

17. The package of claim 1 , wherein the second routing layer includes one or more second redistribution lines formed directly on a second contact pad of the second die and one or more of the first plurality of conductive pillars.

18. The package of claim 17 , wherein the second molding compound laterally surrounds the first routing layer and the first plurality of conductive pillars.

19. The package of claim 17 , wherein the first routing layer is less than 50 μm thick.

20. The package of claim 19 , wherein the second routing layer is less than 50μm thick.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2015
From: ZHAI, JUN; HU, KUNZHONG; CARSON, FLYNN P.
To: APPLE INC.
Reel/Frame 034933/0586 →
Continuity (2)
Provisional Application 62082557 · Nov 20, 2014
Related Publication 20160148904A1 · May 26, 2016