IP Library Granted Patent US 9,281,417
Granted Patent B1
US 9,281,417 · App. 14/627,013 · Granted Mar 8, 2016

GaN-based schottky diode having large bond pads and reduced contact resistance

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Quick Facts
Patent No.
US 9,281,417
App. No.
14/627,013
Granted
Mar 8, 2016
Kind
B1
Abstract

A semiconductor device includes a first active layer disposed over a substrate. The second active layer is disposed on the first active layer. The second active layer has a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer. The first electrode establishes a Schottky junction with the second active layer. The first electrode includes a first electrode pad and a first series of fingers in electrical contact with the first electrode pad. The second electrode establishes an ohmic junction with the first active layer. The second electrode includes a second electrode pad and a second series of fingers in electrical contact with the second electrode pad. The first and second series of electrode fingers form an interdigitated pattern. The first electrode pad is located over the first and second series of electrode fingers.

Claims (24)

1. A semiconductor device, comprising:

a substrate;

a first active layer disposed over the substrate;

a second active layer disposed on the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer;

a first electrode establishing a Schottky junction with the second active layer, the first electrode including a first electrode pad and a first series of fingers in electrical contact with the first electrode pad; and

a second electrode establishing an ohmic junction with the first active layer, the second electrode including a second electrode pad and a second series of fingers being in electrical contact with the second electrode pad, the first and second series of electrode fingers forming an interdigitated pattern and the first electrode pad being located over the first and second series of electrode fingers.

2. The semiconductor device of claim 1 , further comprising a dielectric layer located between the first electrode pad and the second series of fingers.

3. The semiconductor device of claim 1 , wherein the second electrode pad is located over a portion of the second series of fingers that does not form the interdigitated pattern with the first series of fingers.

4. The semiconductor device of claim 1 , wherein the second electrode pad is surrounded by the first electrode pad.

5. The semiconductor device of claim 1 , wherein the first and second series of electrode fingers each include first and second electrode portions that are spaced apart from one another, the first electrode portions of the first and second series of electrode fingers forming a first interdigitated pattern and the second electrode portions of the first and second series of electrode fingers forming a second interdigitated pattern spatially separated from the first interdigitated pattern.

6. The semiconductor device of claim 1 , wherein the first active layer comprises a group III nitride semiconductor material.

7. The semiconductor device of claim 6 , wherein the first active layer comprises GaN.

8. The semiconductor device of claim 1 , wherein the second active layer comprises a group III nitride semiconductor material.

9. The semiconductor device of claim 8 , wherein the second active layer comprises Al X Ga 1-X N, wherein 0<X<1.

10. The semiconductor device of claim 9 , wherein the second active layer is selected from the group consisting of AlGaN, AlInN, and AlInGaN.

11. A semiconductor device, comprising:

a substrate;

a first active layer disposed over the substrate;

a second active layer disposed on the first active layer, the second active layer having a higher bandgap than the first active layer such that a two-dimensional electron gas layer arises between the first active layer and the second active layer;

a first electrode establishing a Schottky junction with the second active layer, the first electrode including a first electrode pad and a first plurality of electrodes in electrical contact with the first electrode pad; and

a second electrode establishing an ohmic junction with the first active layer, the second electrode including a second electrode pad and a second plurality of electrodes being in electrical contact with the second electrode pad, the first electrode pad being located over the first and second plurality of electrodes.

12. The semiconductor device of claim 11 , wherein each of the first plurality of electrodes are circular in shape.

13. The semiconductor device of claim 11 , wherein at least one electrode in the first plurality of electrodes is rectangular in shape.

14. The semiconductor device of claim 1 , wherein each of the first plurality of electrodes are hexagonal in shape.

Assignments (3)
SECURITY INTEREST Recorded Sep 16, 2025
From: VISHAY DALE ELECTRONICS, INC. (N/K/A VISHAY DALE ELECTRONICS, LLC); VISHAY-SILICONIX (N/K/A SILICONIX INCORPORATED); VISHAY GENERAL SEMICONDUCTOR INC. (N/K/A VISHAY GSI, INC.); VISHAY GENERAL SEMICONDUCTOR, LLC (N/K/A VISHAY GSI, INC.); VISHAY INTERTECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 072272/0193 →
SECURITY INTEREST Recorded Jun 12, 2019
From: VISHAY DALE ELECTRONICS, INC.; DALE ELECTRONICS, INC.; VISHAY DALE ELECTRONICS, LLC; VISHAY-DALE, INC.; VISHAY INTERTECHNOLOGY, INC.; SILICONIX INCORPORATED; VISHAY-SILICONIX, INC.; VISHAY-SILICONIX; VISHAY SPRAGUE, INC.; VISHAY EFI, INC.; SPRAGUE ELECTRIC COMPANY; VISHAY GENERAL SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 049440/0876 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2015
From: LIN, YIH-YIN
To: VISHAY GENERAL SEMICONDUCTOR LLC
Reel/Frame 036657/0552 →