IP Library Granted Patent US 9,224,429
Granted Patent B2
US 9,224,429 · App. 14/635,588 · Granted Dec 29, 2015

Three-dimensional semiconductor devices and methods of fabricating the same

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Quick Facts
Patent No.
US 9,224,429
App. No.
14/635,588
Granted
Dec 29, 2015
Kind
B2
Abstract

According to example embodiments of inventive concepts, a three-dimensional semiconductor device may include: a memory cell array including memory cells that may be arranged three-dimensionally, the memory cell array including a left side opposite a right side, and a top side opposite a bottom side in a plan view; at least one word line decoder adjacent to at least one of the left and right sides of the memory cell array; a page buffer adjacent to the bottom side of the memory cell array; and a string selection line decoder adjacent to one of the top and bottom sides of the memory cell array.

Claims (55)

1. A three-dimensional semiconductor device, comprising:

active patterns having a multi-layered and a multi-column structure;

word lines having a multi-column structure, the word lines crossing the active patterns; and

string selection gates configured to control columns of the active patterns, respectively,

the string selection gates including first gates located at a first distance and second gates located at a second distance, the second distance being smaller than the first distance, when measured from a most adjacent one of the word lines that is located closest to the string selection gates,

the most adjacent word line including a plurality of first extended portions extending toward the first gates,

the word lines including other word lines that have a different shape than the most adjacent word line.

2. The device of claim 1 , further comprising:

a block selection line spaced apart from the most adjacent word line by the string selection gates,

the block selection line including second extended portions protruding toward the second gates.

3. The device of claim 1 , wherein the string selection gates are on the columns of the active patterns.

4. The device of claim 1 , wherein the string selection gates are between the columns of the active patterns.

5. The device of claim 1 , further comprising:

a block selection line crossing the columns of the active patterns; and

a ground selection line crossing the columns of the active patterns, wherein

the ground selection line and the block selection line are spaced apart from each other,

the word lines are between the block selection line and the ground selection line, and

the string selection gates are arranged in a zig zag pattern between the block selection line and the most adjacent word line.

6. The device of claim 5 , further comprising:

a drain diffusion region connected to one end of the active patterns; and

a source diffusion region connected to an other end of the active patterns, wherein

the first gates are closer to the drain diffusion region than the second gates.

7. The device of claim 1 , further comprising:

a drain diffusion region connected to one end of the active patterns; and

a source diffusion region connected to an other end of the active patterns, wherein

the second gates are closer to the source diffusion region than the first gates.

8. The device of claim 1 , further comprising:

a drain diffusion region connected to one end of the active patterns; and

a source diffusion region connected to an other end of the active patterns, wherein

the first extended portions of the most adjacent word line are closer to the drain diffusion region than a portion of the most adjacent word line that is between the plurality of first extended portions.

9. The device of claim 1 , further comprising:

a drain diffusion region connected to one end of the active patterns; and

a source diffusion region connected to an other end of the active patterns, wherein

a structure of the most adjacent word line including the plurality of first extended portions is different than a structure of other word lines among the plurality of word lines such that the other word lines do not include extended portions.

10. A three-dimensional semiconductor device, comprising:

active patterns having a multi-layered and a multi-column structure;

word lines having a multi-column structure, the word lines being spaced apart from each other in a first direction, the word lines crossing the active patterns in a second direction that crosses the first direction, the word lines including a dummy word line and other word lines, the dummy word line including extended portions that extend the first direction from a first side of the dummy word line that is opposite a second side of the dummy word line, the extended portions of the dummy word line being spaced apart from each other in the second direction along the first side of the dummy word line; and

string selection gates configured to control columns of the active patterns, respectively,

the string selection gates including first gates and second gates that are spaced apart from each other,

the first gates being spaced apart a first distance in the first direction from the second side of the dummy word line such that the extended portions extend toward the first gates,

and the second gates being spaced apart a second distance from the second side of the dummy word line in the first direction,

the first distance being more the than the second distance.

11. The device of claim 10 , further comprising:

a drain diffusion region connected to one end of the active patterns;

a source diffusion region connected to an other end of the active patterns, wherein

the drain diffusion region and the source diffusion region are spaced apart from each other in the first direction.

12. The device of claim 11 , wherein the first gates are closer to the drain diffusion region than the second gates.

13. The device of claim 11 , wherein the second gates are closer to the source diffusion region than the first gates.

14. The device of claim 11 , wherein

the dummy word line is between the drain diffusion region and the other word lines, and

the extended portions extend toward the drain diffusion region.

15. The device of claim 11 , wherein the string selection gates are between the dummy word line and the drain diffusion region.

16. The device of claim 10 , wherein the first gates and the second gates are arranged in a zigzag pattern in a plan view.

17. The device of claim 10 , wherein the string selection gates are between the columns of the active patterns.

18. The device of claim 10 , wherein the string selection gates are on the columns of the active patterns.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 053654 FRAME: 0254. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 15, 2021
From: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
To: UNIFICATION TECHNOLOGIES LLC
Reel/Frame 058134/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 052853 FRAME: 0153. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 15, 2021
From: UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 058223/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
Reel/Frame 053654/0254 →
PATENT SECURITY AGREEMENT Recorded Jun 5, 2020
From: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MERTON ACQUISITION HOLDCO LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 052853/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: FIO SEMICONDUCTOR TECHNOLOGIES, LLC
To: ACACIA RESEARCH GROUP LLC
Reel/Frame 052095/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: ACACIA RESEARCH GROUP LLC
To: UNIFICATION TECHNOLOGIES LLC
Reel/Frame 052096/0225 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT DOCUMENT ATTACHED PREVIOUSLY RECORDED ON REEL 047702 FRAME 0815. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 16, 2019
From: SAMSUNG ELECTRONICS CO., LTD.
To: FIO SEMICONDUCTOR TECHNOLOGIES, LLC
Reel/Frame 048917/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2018
From: SAMSUNG ELECTRONICS CO., LTD.
To: FIO SEMICONDUCTOR TECHNOLOGIES, LLC
Reel/Frame 047702/0815 →