IP Library Granted Patent US 9,320,094
Granted Patent B2
US 9,320,094 · App. 14/638,257 · Granted Apr 19, 2016

Electronic circuits for driving series connected light emitting diode strings

Inventors: Gregory Szczeszynski (Hollis, NH); Bassem Alnahas (Manchester, NH); Vijay Mangtani (Nashua, NH)
Assignee: Allegro Microsystems, LLC
H05B33/0815H05B33/0818H05B33/0827G09G3/342G09G3/3413G09G2320/064G09G2330/021
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Quick Facts
Patent No.
US 9,320,094
App. No.
14/638,257
Granted
Apr 19, 2016
Kind
B2
Abstract

Electronic circuits provide an error signal to control a regulated output voltage signal generated by a controllable DC-DC converter for driving one or more series connected strings of light emitting diodes.

Claims (20)

1. An electronic circuit for driving a plurality of series connected light emitting diode strings with a controllable DC-DC converter, the electronic circuit comprising:

a plurality of field effect transistors (FETs), each FET having a respective drain, source, and gate, wherein each FET is configured to pass a predetermined current from the respective drain to the respective source;

a plurality of resistors, each having respective first and second ends, each resistor coupled at the first end to a respective source of one of the plurality of FETs forming a respective current sense node, wherein the drain of each FET or the second end of each resistor is coupled to an end of a respective one of the plurality of series connected light emitting diode strings;

a plurality of amplifiers, each amplifier having a respective input node coupled to a respective current sense node, and each amplifier having a respective output node coupled to a respective gate of a respective FET, wherein each one of the plurality of amplifiers is configured to generate a respective control voltage signal at the respective output node indicative of a control of the respective FET for the respective FET to pass the predetermined current from the respective drain to the respective source;

a maximum select circuit having a plurality of input nodes coupled to receive the control voltage signals from the plurality of amplifiers and having an output node, wherein the maximum select circuit is configured to select a largest one of the control voltage signals and to generate a signal representative of the largest one of the control voltage signals at the output node; and

an error amplifier having an input node and an output node, wherein the input node of the error amplifier is coupled to the output node of the maximum select circuit, wherein the error amplifier is configured to generate an error signal at the output node of the error amplifier, wherein the error amplifier comprises a transconductance amplifier, wherein the signal representative of the largest one of the control voltage signals, at the input node of the error amplifier, comprises a voltage signal, wherein the error amplifier is configured to generate the error signal as a current signal; wherein the electronic circuit further comprises:

a capacitor coupled to the output node of the error amplifier to provide a loop filter for loop stability, wherein the capacitor comprises an output capacitance of the error amplifier in parallel with an input capacitance of the controllable DC-DC converter.

2. The electronic circuit of claim 1 , wherein the controllable DC-DC converter is coupled to receive the error signal, wherein the controllable DC-DC converter comprises an input node configured to receive a voltage and an output node at which regulated output voltage is generated by the controllable DC-DC converter, wherein the error signal is configured to control the regulated output voltage.

3. The electronic circuit of claim 2 , wherein the controllable DC-DC converter comprises a switching regulator.

4. A method of driving a plurality of series connected light emitting diode strings with a controllable DC-DC converter, the method comprising:

attempting to pass a respective predetermined current through each one of the plurality of series connected light emitting diode strings with a respective feedback current control circuit, resulting in a respective voltage appearing at an end of each one of the plurality of series connected light emitting diode strings, wherein a control node of the feedback circuit generates a control voltage that changes in a direction opposite to a change of the respective voltage;

detecting a largest one of the control voltages;

generating an error signal representative of the largest one of the control voltages to control the DC-DC converter, wherein the error signal is generated as a current signal; and

filtering the error signal with a loop filter comprising a capacitor to provide loop stability wherein the capacitor comprises an output capacitance of the error amplifier in parallel with an input capacitance of the controllable DC-DC converter.

5. The method of claim 4 , wherein the generating the error signal comprises:

generating the error signal error signal with a transconductance amplifier.

6. The method of claim 4 , wherein the controllable DC-DC converter is coupled to receive the error signal, wherein the controllable DC-DC converter comprises an input node configured to receive a voltage and an output node at which regulated output voltage is generated by the controllable DC-DC converter, wherein the error signal is configured to control the regulated output voltage.

7. The method of claim 6 , wherein the controllable DC-DC converter comprises a switching regulator.

8. The method of claim 7 , wherein the generating the error signal comprises:

generating the error signal with a transconductance amplifier.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 053957/FRAME 0874 Recorded Nov 1, 2023
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 065420/0572 →
RELEASE OF SECURITY INTEREST IN PATENTS (R/F 053957/0620) Recorded Jun 22, 2023
From: MIZUHO BANK, LTD., AS COLLATERAL AGENT
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 064068/0360 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: MIZUHO BANK LTD., AS COLLATERAL AGENT
Reel/Frame 053957/0620 →
PATENT SECURITY AGREEMENT Recorded Oct 1, 2020
From: ALLEGRO MICROSYSTEMS, LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 053957/0874 →
CHANGE OF NAME Recorded Jun 21, 2017
From: ALLEGRO MICROSYSTEMS, INC.
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 042928/0969 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME AND RECEIVING PARTY POSTAL CODE PREVIOUSLY RECORDED ON REEL 035093 FRAME 0945. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 3, 2017
From: SZCZESZYNSKI, GREGORY; ALNAHAS, BASSEM; MANGTANI, VIJAY
To: ALLEGRO MICROSYSTEMS, INC.
Reel/Frame 042389/0351 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2015
From: SZCZESZYNSKI, GREGORY; ALNAHAS, BASSEM; MANGTANI, VIJAY
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 035093/0945 →
Continuity (5)
Division 14149167 · Jan 7, 2014
Division 13428654 · Mar 23, 2012
Division 12267645 · Nov 10, 2008
Provisional Application 60988520 · Nov 16, 2007
Related Publication 20150181671A1 · Jun 25, 2015