InGaN ohmic source contacts for vertical power devices
View Patent ↗A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region. The source includes a GaN-layer coupled to an InGaN layer. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction.
1. A method for fabricating a vertical power device, the method comprising:
providing a III-nitride substrate;
forming a first III-nitride epitaxial layer coupled to the III-nitride substrate, wherein the first III-nitride epitaxial layer is characterized by a first dopant concentration;
forming a second III-nitride epitaxial layer coupled to the first III-nitride epitaxial layer, wherein the second III-nitride epitaxial layer has a second dopant concentration of the same type and less than or equal to the first dopant concentration;
forming a multilayered structure coupled to the second III-nitride epitaxial layer, the multilayered structure including a third III-nitride epitaxial layer and an indium gallium nitride (InGaN) layer, wherein both the third III-nitride epitaxial layer and the InGaN layer have a third dopant concentration of the same type and greater than the first dopant concentration;
removing at least a portion of the multilayered structure and at least a portion of the second III-nitride epitaxial layer to form a channel region of the second III-nitride epitaxial layer;
forming an epitaxial layer of an opposite type from the first III-nitride epitaxial layer coupled to the channel region;
forming a first metallic structure electrically coupled to the III-nitride substrate;
forming a second metallic structure electrically coupled to the epitaxial layer of the opposite type; and
forming a third metallic structure electrically coupled to the multilayered structure.
2. The method of claim 1 wherein the percentage of indium in the InGaN layer is between 20% and 90%.
3. The method of claim 1 wherein the first III-nitride epitaxial layer includes a GaN material.
4. The method of claim 1 wherein the third III-nitride epitaxial layer includes a GaN material.
5. The method of claim 1 wherein the first III-nitride epitaxial layer has n-type conductivity.
6. The method of claim 1 wherein the vertical power device is a vertical junction field effect transistor (VJFET).
7. The method of claim 6 wherein the third metallic structure is disposed over the InGaN layer and forms a source contact of the VJFET.
8. The method of claim 6 wherein the first metallic structure forms the drain contact of the VJFET.
9. The method of claim 6 wherein the second metallic structure forms the gate contact of the VJFET.