IP Library Granted Patent US 9,569,641
Granted Patent B2
US 9,569,641 · App. 14/667,303 · Granted Feb 14, 2017

Data processing system with temperature monitoring for security

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Quick Facts
Patent No.
US 9,569,641
App. No.
14/667,303
Granted
Feb 14, 2017
Kind
B2
Abstract

A processing system includes a processor and a temperature security module coupled to provide a temperature tamper signal to the processor. The temperature security module includes a shelf mode trim value, an operating mode trim value, and a programmable temperature trim value. One of the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value, is used based on a deployment mode of the processing system to set a temperature monitor trim value.

Claims (54)

1. A processing system comprising:

a processor; and

a temperature security module coupled to provide a temperature tamper signal to the processor, wherein the temperature security module includes:

a shelf mode trim value;

an operating mode trim value; and

a programmable temperature trim value,

wherein one of a group consisting of: the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value, is used based on a deployment mode of the processing system to set a temperature monitor trim value, wherein the temperature security module is configured to use one of the programmable trim value or the shelf mode trim value to set the temperature monitor trim value during a first deployment mode in which a battery power supply is provided to the temperature security module, operating power is not provided to the processing system, and a shelf mode indicator indicates shelf mode,

wherein the temperature security module further includes

a temperature monitor configured to provide the temperature tamper signal when a detected temperature of the processing system is not within a temperature range indicated by the selected one of the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value.

2. The processing system of claim 1 wherein the temperature security module further includes:

trim select logic configured to select between the shelf mode trim value and the operating mode trim value.

3. The processing system of claim 2 further comprising:

a programmable temperature trim select indicator configured to select between the programmable temperature trim value, and one of the shelf mode trim value and the operating mode trim value selected by the trim select logic.

4. The processing system of claim 1 wherein:

the temperature security module is configured to use the operating mode trim value to set the temperature monitor trim value during a second deployment mode in which operating power is provided to the processing system and the shelf mode indicator indicates shelf mode, and

the temperature security module is configured to use one of the programmable temperature trim value or the operating mode trim value to set the temperature monitor trim value during a third deployment mode in which the processing system has been placed in used by the customer and the shelf mode indicator does not indicate shelf mode.

5. The processing system of claim 4 further comprising:

a security controller, wherein the security controller prevents access to the secure information in the processing system when the deployment mode has the second value.

6. The processing system of claim 1 wherein:

the shelf mode trim value includes a high shelf mode trim value and a low shelf mode trim value,

the operating mode trim value includes a high operating mode trim value and a low operating mode trim value, and

the programmable temperature trim value includes a high programmable temperature trim value and a low programmable temperature trim value.

7. The processing system of claim 6 wherein:

the temperature security module further includes

a low temperature offset value that is used to adjust a selected one of the low shelf mode trim value, the low operating mode trim value, and the low programmable temperature trim value, and

a high temperature offset value that is used to adjust a selected one of the high shelf mode trim value, the high operating mode trim value, and the high programmable temperature trim value.

8. The processing system of claim 1 wherein:

the temperature security module further includes

a programmable trim disable indicator to prevent use of the programmable temperature trim value; and

a one-time programmable trim value lock indicator to lock the programmable temperature trim value and prevent any changes to the programmable temperature trim value until battery power is removed and applied again to the temperature security module.

9. The processing system of claim 1 wherein:

the shelf mode trim value, the operating mode trim value, and the programmable temperature trim value are different from one another.

10. The processing system of claim 1 wherein:

the temperature security module operates on battery power and the battery power is supplied to the temperature security module even when a supply power is not provided to the processor.

11. A processing system comprising:

secure storage circuitry;

a security controller;

a temperature security module coupled to provide a temperature tamper signal to the security controller;

a battery power supply coupled to supply power to the secure storage circuitry, the security controller, and the temperature security module,

wherein the temperature security module is configured to select between a shelf mode temperature trim value and an operating mode temperature trim value when a shelf mode indicator indicates the processing system is in shelf mode, and to select between the operating mode temperature trim value and a programmable temperature trim value when the shelf mode indicator indicates the processing system is not in shelf mode,

wherein the temperature security module further includes

a temperature monitor configured to provide the temperature tamper signal when a detected temperature of the processing system is not within a temperature range indicated by a selected one of the programmable temperature trim value, the shelf mode trim value, and the operating mode trim value.

12. The processing system of claim 11 wherein:

the secure storage circuitry prevents access to secure information in the secure storage circuitry when the shelf mode indicator indicates the processing system is in the shelf mode.

13. The processing system of claim 11 wherein:

the shelf mode trim value includes a high shelf mode trim value and a low shelf mode trim value,

the operating mode trim value includes a high operating mode trim value and a low operating mode trim value, and

the programmable temperature trim value includes a high programmable temperature trim value and a low programmable temperature trim value.

14. The processing system of claim 13 wherein:

the temperature security module further includes

a low temperature offset value that is used to adjust a selected one of the low shelf mode trim value, the low operating mode trim value, and the low programmable temperature trim value, and

a high temperature offset value that is used to adjust a selected one of the high shelf mode trim value, the high operating mode trim value, and the high programmable temperature trim value.

15. The processing system of claim 11 wherein:

the temperature security module selects the shelf mode temperature trim value when operating power supply is not provided to the processing system and the shelf mode indicator indicates the shelf mode.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENTATION - INITIAL CONVENYANCE LISTED CHANGE OF NAME. PREVIOUSLY RECORDED ON REEL 040579 FRAME 0827. ASSIGNOR(S) HEREBY CONFIRMS THE UPDATE CONVEYANCE TO MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Dec 15, 2016
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 040945/0252 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
CHANGE OF NAME Recorded Nov 9, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040579/0827 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0341 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0359 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0974 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0080 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0112 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0095 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2015
From: ARORA, MOHIT; BHARGAVA, PRASHANT; GALLIMORE, SIMON J.; MCQUIRK, DALE J.; SEABERG, CHARLES E.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 035257/0024 →