IP Library Granted Patent US 9,703,729
Granted Patent B2
US 9,703,729 · App. 14/677,806 · Granted Jul 11, 2017

Detecting the orientation of a multimedia link connected to a device

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Quick Facts
Patent No.
US 9,703,729
App. No.
14/677,806
Granted
Jul 11, 2017
Kind
B2
Abstract

Embodiments of the present disclosure are related to identifying the orientation of a multimedia link connected between a source device and a sink device. A sink device includes a plurality of pins that are configured to interface with a plurality of pins of the multimedia link. The sink device identifies based on the values of one or more pins of the plurality of pins of the sink device whether the multimedia link is connected to the sink device. Further, the sink device determines an orientation of the multimedia link connected to the sink device. The multimedia link can be in one of two orientations, straight or flipped. The sink device may communicate the orientation of the multimedia link to the source device. The source device may perform lane mapping based on whether the multimedia link is in the straight or flipped orientation.

Claims (56)

1. A method of identifying an orientation of a multimedia link connected to a sink device, the method comprising:

detecting a multimedia link connection at the sink device, the sink device including a plurality of pins to interface with a plurality of pins of the multimedia link, the plurality of pins of the sink device comprising a first control bus pin and a second control bus pin;

monitoring a first change in value of high to low of the first control bus pin and a second change in value of high to low of the second control bus pin, the second change in value occurring at a different time than the first change in value;

determining which of the first change in value and the second change in value occurs first;

responsive to the determining which of the first change in value and the second change in value occurs first, identifying the orientation of the multimedia link connected to the sink device; and

transmitting the identified orientation of the multimedia link connected to the sink device to a source device.

2. The method of claim 1 , wherein the detecting of the multimedia link connection at the sink device further comprises:

identifying a change in value of high to low of one or more of the first control bus pin and the second control bus pin of the sink device; and

detecting that the multimedia link is connected to the sink device based on the change in value of high to low of one or more of the first control bus pin and the second control bus pin of the sink device.

3. The method of claim 2 , wherein the identifying of the orientation of the multimedia link connected to the sink device further comprises:

responsive to determining that the first change in value occurs first, determining that the multimedia link is in a straight orientation.

4. The method of claim 3 , wherein the multimedia link comprises a pull down resistor connected to the first control bus pin of the sink device.

5. The method of claim 2 , wherein the identifying of the orientation of the multimedia link connected to the sink device further comprises:

responsive to determining that the second change in value occurs first, determining that the multimedia link is in a flipped orientation.

6. The method of claim 5 , wherein the multimedia link comprises a pull down resistor connected to the second control bus pin of the sink device.

7. The method of claim 1 , further comprising:

identifying a plurality of data lanes of the multimedia link; and

mapping one or more data lanes of the sink device to one or more data lanes of the plurality of data lanes of the multimedia link based on the identified orientation of the multimedia link.

8. A first device, comprising:

a plurality of pins to interface with a plurality of pins of a multimedia link, the plurality of pins of the first device comprising a first control bus pin and a second control bus pin; and

a memory storing instructions, the instructions when executed by a processor cause the processor to:

detect a multimedia link connection at the first device;

monitor a first change in value of high to low of the first control bus pin and a second change in value of high to low of the second control bus pin, the second change in value occurring at a different time than the first change in value;

determine which of the first change in value and the second change in value occurs first;

responsive to the determining which of the first change in value and the second change in value occurs first, identify an orientation of the multimedia link connected to the first device; and

transmit the identified orientation of the multimedia link connected to the first device to a second device.

9. The first device of claim 8 , wherein the detecting of the multimedia link connection at the first device comprises:

identifying a change in value of high to low of one or more of the first control bus pin and the second control bus pin of the first device; and

detecting that the multimedia link is connected to the first device based on the change in value of high to low of one or more of the first control bus pin and the second control bus pin of the first device.

10. The first device of claim 9 , wherein the identifying of the orientation of the multimedia link connected to the first device comprises:

responsive to determining that the first change in value occurs first, determining that the multimedia link is in a straight orientation.

11. The first device of claim 10 , wherein the multimedia link comprises a pull down resistor connected to the first control bus pin of the first device.

12. The first device of claim 9 , wherein the identifying of the orientation of the multimedia link connected to the first device comprises:

responsive to determining that the second change in value occurs first, determining that the multimedia link is in a flipped orientation.

13. The first device of claim 12 , wherein the multimedia link comprises a pull down resistor connected to the second control bus pin of the first device.

14. The first device of claim 8 , wherein the multimedia link comprises a plurality of data lanes, the instructions further causing the processor to:

map one or more data lanes of the first device to one or more data lanes of the plurality of data lanes of the multimedia link based on the identified orientation of the multimedia link.

15. A non-transitory computer readable medium storing a representation of a first device, the first device comprising:

a plurality of pins to interface with a plurality of pins of a multimedia link, the plurality of pins of the first device comprising a first control bus pin and a second control bus pin; and

a memory storing instructions, the instructions when executed by a processor cause the processor to:

detect a multimedia link connection at the first device;

monitor a first change in value of high to low of the first control bus pin and a second change in value of high to low of the second control bus pin, the second change in value occurring at a different time than the first change in value;

determine which of the first change in value and the second change in value occurs first;

responsive to the determining which of the first change in value and the second change in value occurs first, identify an orientation of the multimedia link connected to the first device; and

transmit the identified orientation of the multimedia link connected to the first device to a second device.

16. The non-transitory computer readable medium of claim 15 , wherein the detecting of the multimedia link connection at the first device comprises:

identifying a change in value of high to low of one or more of the first control bus pin and the second control bus pin of the first device; and

detecting that the multimedia link is connected to the first device based on the change in value of high to low of the one or more of the first control bus pin and the second control bus pin of the sink device.

17. The non-transitory computer readable medium of claim 16 , wherein the identifying of the orientation of the multimedia link connected to the first device comprises:

responsive to determining that the first change in value occurs first, determining that the multimedia link is in a straight orientation.

18. The non-transitory computer readable medium of claim 17 , wherein the multimedia link comprises a pull down resistor connected to the first control bus pin of the first device.

19. The non-transitory computer readable medium of claim 16 , wherein the identifying of the orientation of the multimedia link connected to the first device comprises:

responsive to determining that the second change in value occurs first, determining that the multimedia link is in a flipped orientation.

20. The non-transitory computer readable medium of claim 19 , wherein the multimedia link comprises a pull down resistor connected to the second control bus pin of the first device.

21. The non-transitory computer readable medium of claim 15 , wherein the multimedia link comprises a plurality of data lanes, the instructions further causing the processor to:

map one or more data lanes of the first device to one or more data lanes of the plurality of data lanes of the multimedia link based on the identified orientation of the multimedia link.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2021
From: LATTICE SEMICONDUCTOR CORPORATION
To: UNIVERSAL CONNECTIVITY TECHNOLOGIES INC.
Reel/Frame 058979/0440 →
RELEASE OF SECURITY INTEREST Recorded Nov 10, 2021
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 058067/0896 →
RELEASE OF SECURITY INTEREST Recorded Nov 3, 2021
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 058013/0427 →
SECURITY INTEREST Recorded Jul 18, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049795/0481 →
SECURITY INTEREST Recorded Mar 8, 2016
From: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 037924/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2015
From: RANADE, SHRIKANT; KIM, GYUDONG; HARRELL, CHANDLEE B.
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036651/0822 →
MERGER Recorded Aug 21, 2015
From: SILICON IMAGE, INC.
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 036419/0792 →