Replacement channel TFET
A semiconductor structure includes a substrate and an intrinsic replacement channel. A tunneling field effect transistor (TFET) fin may be formed by the intrinsic replacement channel, a p-fin and an n-fin formed upon the substrate. The p-fin may serve as the source of the TFET and the n-fin may serve as the drain of the TFET. The replacement channel may be formed in place of a sacrificial channel of a diode fin that includes the p-fin, the n-fin, and the sacrificial channel at the p-fin and n-fin junction.
1. A semiconductor device fabrication process comprising:
forming a diode fin upon a semiconductor substrate, the diode fin comprising a p-fin, an n-fin, and sacrificial channel at a junction of the p-fin and the n-fin;
forming a sacrificial gate upon the diode fin overlaying the sacrificial channel;
removing the sacrificial gate to expose the sacrificial channel;
removing the sacrificial channel to expose the semiconductor substrate beneath the sacrificial channel, the removal of the sacrificial channel forming a p-fin sidewall and an opposing n-fin sidewall; and
forming an intrinsic replacement channel in place of the removed sacrificial channel.
2. The semiconductor fabrication process of claim 1 , wherein the formation of the intrinsic replacement channel forms a tunneling field effect transistor (TFET) fin comprising the p-fin, the intrinsic replacement channel, and the n-fin.
3. The semiconductor device fabrication process of claim 2 , further comprising:
forming a replacement gate upon the TFET fin overlaying the intrinsic replacement channel.
4. The semiconductor device fabrication process of claim 1 , wherein forming the intrinsic replacement channel further comprises:
epitaxially growing intrinsic type III-V semiconductor material from the exposed semiconductor substrate.
5. The semiconductor device fabrication process of claim 1 , wherein forming the intrinsic replacement channel further comprises:
epitaxially growing intrinsic type III-V semiconductor material from the p-fin sidewall.
6. The semiconductor device fabrication process of claim 1 , wherein forming the intrinsic replacement channel further comprises:
epitaxially growing intrinsic type III-V semiconductor material from the n-fin sidewall.
7. The semiconductor device fabrication process of claim 1 , further comprising:
forming a fin layer upon the semiconductor substrate;
doping an p-portion of the fin layer; and
doping an adjacent n-portion of the fin layer.
8. The semiconductor device fabrication process of claim 7 , wherein forming the diode fin further comprises:
removing portions of the doped p-portion and the doped adjacent n-portion; and
retaining distinct portions of the doped p-portion and the doped adjacent n-portion, the retained distinct portions of the doped p-portion and the doped adjacent n-portion forming the diode fin.
9. The semiconductor device fabrication process of claim 8 , further comprising:
forming shallow trench isolation region(s) upon the semiconductor substrate adjacent to the diode fin.
10. The semiconductor device fabrication process of claim 9 , wherein forming the sacrificial gate further comprises:
forming the sacrificial gate upon the STI region(s).
11. The semiconductor device fabrication process of claim 10 , further comprising:
forming gate spacers upon sidewalls of the sacrificial gate.
12. The semiconductor device fabrication process of claim 11 , wherein removing the sacrificial gate further comprises:
removing the sacrificial gate between the gate spacers to expose the STI region(s).
13. The semiconductor device fabrication process of claim 7 , wherein forming the fin layer further comprises:
epitaxially growing an intrinsic type III-V semiconductor material from an upper surface of the semiconductor substrate.
14. A semiconductor device comprising:
a tunneling field effect transistor (TFET) fin upon a semiconductor substrate, the TFET fin comprising:
a p-fin;
a n-fin; and
an intrinsic replacement channel aligned with and contacting the p-fin and the n-fin, the intrinsic replacement channel directly contacting the semiconductor substrate; and
a replacement gate formed directly on and contacting the intrinsic replacement channel, the replacement gate formed from a conductive gate material.
15. The semiconductor device of claim 14 , wherein the TFET fin is formed from a diode fin comprising the p-fin, the n-fin, and a sacrificial channel at a junction of the p-fin and the n-fin.
16. The semiconductor device of claim 15 , wherein the intrinsic replacement channel takes the place of the sacrificial channel.
17. A semiconductor device fabrication process comprising:
providing a bulk semiconductor substrate;
epitaxially growing a fin layer from an upper surface of the bulk semiconductor substrate;
p-doping a portion of the fin layer and n-doping an adjacent portion of the fin layer;
forming a diode fin by removing sections of the p-doped portion and removing sections of the n-doped adjacent portion, the diode fin comprising:
a p-fin;
an n-fin; and
a sacrificial channel at a junction of the p-fin and the n-fin; and
forming a tunneling field effect transistor (TFET) fin by:
removing the sacrificial channel to expose a portion of the upper surface of the bulk semiconductor substrate beneath the sacrificial channel; and
forming an intrinsic replacement channel in place of the removed sacrificial channel.
18. The semiconductor device fabrication process of claim 17 , further comprising:
forming shallow trench isolation (STI) regions(s) upon the bulk semiconductor substrate adjacent to the diode fin.
19. The semiconductor device fabrication process of claim 18 , further comprising:
forming a sacrificial gate upon the STI region(s) and upon the diode fin overlaying the sacrificial channel.
20. The semiconductor device fabrication process of claim 19 , further comprising:
exposing the sacrificial channel by removing the sacrificial gate.