IP Library Granted Patent US 9,466,712
Granted Patent B2
US 9,466,712 · App. 14/697,963 · Granted Oct 11, 2016

Resurf semiconductor device charge balancing

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Quick Facts
Patent No.
US 9,466,712
App. No.
14/697,963
Granted
Oct 11, 2016
Kind
B2
Abstract

Breakdown voltage BVdss is enhanced and ON-resistance reduced in RESURF devices, e.g., LDMOS transistors, by careful charge balancing, even when body and drift region charge balance is not ideal, by: (i) providing a plug or sinker near the drain and of the same conductivity type extending through the drift region at least into the underlying body region, and/or (ii) applying bias Viso to a surrounding lateral doped isolation wall coupled to the device buried layer, and/or (iii) providing a variable resistance bridge between the isolation wall and the drift region. The bridge may be a FET whose source-drain couple the isolation wall and drift region and whose gate receives control voltage Vc, or a resistor whose cross-section (X, Y, Z) affects its resistance and pinch-off, to set the percentage of drain voltage coupled to the buried layer via the isolation wall.

Claims (31)

1. A semiconductor device employing RESURF charge balancing, comprising:

a body region;

a drift region located in the body region;

a drain located in the drift region;

a buried layer underlying the body region;

a surrounding doped lateral isolation wall Ohmically coupled to the buried layer; and

a conductive bridge coupling the drift region and the isolation wall for applying a voltage to the buried layer for charge balancing, wherein a portion of voltage applied to the drain is coupled via the conductive bridge and the isolation wall to the buried layer, wherein the bridge is a field effect transistor having source-drain coupled between the drift region and the isolation wall and a gate adapted to receive a control voltage Vc that id distinct from the drain voltage for determining the voltage coupled to the buried layer for charge balancing,

wherein RESURF charge balancing is obtained by:

(i) including a doped sinker coupled to the drain and extending through the drift region at least into the underlying body region; or

(ii) directly or indirectly applying a bias voltage to the buried layer; or

(iii) a combination of (i) and (ii) above.

2. An LDMOS device, comprising:

a body region;

a drift region located in the body region;

a drain located in the drift region;

a buried layer underlying the body region;

a surrounding doped lateral isolation wall Ohmically coupled to the buried layer; and

further comprising:

a doped sinker region coupled to the drain and extending through the drift region at least into the underlying body region; or

a variable resistance bridge coupling the drift region and the isolation wall, and whose resistance is adapted to determine at least in part what portion of a voltage applied to the drain is coupled to the buried layer, wherein the bridge is a FET whose source-drain couple the isolation wall and drift region and whose gate is adapted to receive control voltage Vc that is distinct from the drain voltage for adjusting the resistance of the FET.

3. The device of claim 2 , wherein the doped sinker is of the same conductivity type as the drain and has a doping intermediate between doping of the drift region and the drain.

4. An LDMOS device, comprising:

a body region;

a drift region located in the body region;

a drain located in the drift region;

a buried layer underlying the body region;

a surrounding doped lateral isolation wall Ohmically coupled to the buried layer; and

further comprising:

a doped sinker region coupled to the drain and extending through the drift region at least into the underlying body region; or

a variable resistance bridge coupling the drift region and the isolation wall, and whose resistance is adapted to determine at least in part what portion of a voltage applied to the drain is coupled to the buried layer, wherein the bridge is a resistor whose cross-section affects its resistance, which resistance is adapted to determine in part how much of a voltage applied to the drain is coupled to the buried layer via the isolation wall.

5. The device of claim 4 , wherein the doped sinker is of the same conductivity type as the drain and has a doping intermediate between doping of the drift region and the drain.

Assignments (24)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2016
From: MIN, WON GI; XU, HONGZHONG; ZHANG, ZHIHONG; ZUO, JIANG-KAI
To: FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
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PATENT RELEASE Recorded Dec 21, 2015
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SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 6, 2015
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