Granted Patent B1

US 9,720,733 · App. 14/698,581 · Granted Aug 1, 2017

Abstract

Claims (50)

1. A machine implemented method, comprising:

designating a hardware engine from among a plurality of hardware engines of an adapter coupled to a computing device as a master engine; wherein the plurality of hardware engines are adapted to process control blocks that are received from the computing device to read data from a storage device, write data to the storage device, obtain status for an input/output request and perform a management task associated with the adapter including obtaining a status of executing a command by the adapter, and aborting the command by the adapter; and wherein the management task is processed by the master engine;

receiving a plurality of control blocks from the computing device at the adapter;

evaluating a field of each control block by the adapter to determine a control block type from among a continuation control block for data transfer using more than one control block; a direct route control block for a specific hardware engine; a neutral control block routable to any available hardware engine; and a management task control block for the management task;

selecting a routing type for each control block based on the evaluation and by using a first data structure, wherein the first data structure stores an identifier for each of the plurality of hardware engines and an indicator for a command routing type for the continuation control block, an indicator for a direct routing type for the direct route control block, an indicator for a management routing type for the management task control block and an indicator for a neutral routing type for the neutral control block;

routing the continuation control block to a same hardware engine that processed a previous control block;

routing the neutral control block to any available hardware engine from among the plurality of hardware engines;

routing the direct route control block to the specific hardware engine;

routing the management task control block to the master hardware engine from among the plurality of hardware engines; and

tracking a routing status of the plurality of control blocks by a second data structure, where the second data structure stores an indicator indicating a status for each routing type, hardware engine identifiers identifying hardware engines processing the control blocks and a count value for the continuation type control block.

2. The method of claim 1 , wherein the adapter maintains the first data structure at a storage location accessible to the adapter.

3. The method of claim 1 , wherein the adapter maintains the second data structure at a storage location accessible to the adapter.

4. The method of claim 1 , wherein the direct route control block includes a field from which the specific hardware engine is identified.

5. The method of claim 2 , wherein the first data structure tracks a control block count for the continuation control block.

6. The method of claim 1 , wherein the plurality of control blocks are created by a driver executed by the computing device.

7. The method of claim 1 , wherein a routing priority for any of the plurality of control blocks is established by the control block type.

8. A non-transitory, machine readable storage medium having stored thereon instructions for performing a method, comprising machine executable code which when executed by at least one machine, causes the machine to:

designate a hardware engine from among a plurality of hardware engines of an adapter coupled to a computing device as a master engine; wherein the plurality of hardware engines are adapted to process control blocks that are received from the computing device to read data from a storage device, write data to the storage device, obtain status for an input/output request and perform a management task associated with the adapter including obtaining a status of executing a command by the adapter, and aborting the command by the adapter; and wherein the management task is processed by the master engine;

receive a plurality of control blocks from the computing device at the adapter;

evaluate a field of each control block by the adapter to determine a control block type from among a continuation control block for data transfer using more than one control block; a direct route control block for a specific hardware engine; a neutral control block routable to any available hardware engine; and a management task control block for the management task;

select a routing type for each control block based on the evaluation and by using a first data structure, wherein the first data structure stores an identifier for each of the plurality of hardware engines and an indicator for a command routing type for the continuation control block, an indicator for a direct routing type for the direct route control block, an indicator for a management routing type for the management task control block and an indicator for a neutral routing type for the neutral control block;

route the continuation control block to a same hardware engine that processed a previous control block;

route the neutral control block to any available hardware engine from among the plurality of hardware engines;

route the direct route control block to the specific hardware engine;

and

route the management task control block to the master hardware engine from among the plurality of hardware engines; and

track a routing status of the plurality of control blocks by a second data structure, where the second data structure stores an indicator indicating a status for each routing type, hardware engine identifiers identifying hardware engines processing the control blocks and a count value for the continuation type control block.

9. The storage medium of claim 8 , wherein the adapter maintains the first data structure at a storage location accessible to the adapter.

10. The storage medium of claim 8 , wherein the adapter maintains the second data structure at a storage location accessible to the adapter.

11. The storage medium of claim 8 , wherein the direct route control block includes a field from which the specific hardware engine is identified.

12. The storage medium of claim 9 , wherein the first data structure tracks a control block count for the continuation type control block.

13. The storage medium of claim 8 , wherein the plurality of control blocks are created by a driver executed by the computing device.

14. The storage medium of claim 8 , wherein a routing priority for any of the plurality of control blocks is established by the control block type.

15. A device for processing input/output requests coupled to a computing device, comprising:

a plurality of hardware engines for processing control blocks, where the control blocks are to read data, write data, obtain status for an input/output request and perform a management task; where one of the hardware engine is designated as a master engine to perform the management task including obtaining a status of executing a command by the device, and aborting the command by the device; and

a direct memory access (DMA) request logic having hardware to execute instructions to:

receive a plurality of control blocks from the computing device;

evaluate a field of each control block to determine a control block type from among a continuation control block for data transfer using more than one control block; a direct route control block for a specific hardware engine; a neutral control block routable to any available hardware engine; and a management task control block for the management task;

select a routing type for each control block based on the evaluation and by using a first data structure, wherein the first data structure stores an identifier for each of the plurality of hardware engines and an indicator for a command routing type for the continuation control block, an indicator for a direct routing type for the direct route control block, an indicator for a management routing type for the management task control block and an indicator for a neutral routing type for the neutral control block;

route the continuation control block to a same hardware engine that processed a previous control block;

route the neutral control block to any available hardware engine from among the plurality of hardware engines;

route the direct route control block to the specific hardware engine;

route the management task control block to the master hardware engine from among the plurality of hardware engines; and

track a routing status of the plurality of control blocks by a second data structure to, where the second data structure stores an indicator indicating a status for each routing type, hardware engine identifiers identifying hardware engines processing the control blocks and a count value for the continuation type control block.

16. The device claim 15 , wherein the device maintains the first data structure at a storage location accessible to the device.

17. The device of claim 16 , wherein the first data structure tracks a control block count for the continuation type control block.

18. The device of claim 15 , wherein the device maintains the second data structure at a storage location accessible to the device.

19. The device of claim 15 , wherein the direct route control block includes a field from which the specific hardware engine is identified.

20. The device of claim 15 , wherein the plurality of control blocks are created by a driver executed by the computing device.

21. The device of claim 15 , wherein a routing priority for any of the plurality of control blocks is established by the control block type.

Assignments (7)