IP Library Granted Patent US 9,590,506
Granted Patent B2
US 9,590,506 · App. 14/713,116 · Granted Mar 7, 2017

Multiple mode power regulator

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Quick Facts
Patent No.
US 9,590,506
App. No.
14/713,116
Granted
Mar 7, 2017
Kind
B2
Abstract

A power regulator includes an output terminal to provide a regulated voltage, a first control unit to control a first operation mode, a second control unit to control a second operation mode, and a detection unit connected to the output terminal. The detection unit detects, at start-up, whether or not an external inductor is connected to the output terminal, activates the first operation mode when an external inductor is detected, and activates the second operation mode when no external inductor is detected. The detection unit also detects in which of at least two distinct inductance ranges the inductance of the detected inductor lies so as to provide inductance dependent control in the first operation mode.

Claims (37)

1. A power regulator having a first operational mode and a second operational mode, the power regulator comprising:

an output terminal configured to provide a regulated voltage;

a first control unit configured to control the power regulator in the first operational mode;

a second control unit configured to control the power regulator in the second operational mode; and

a detection unit connected to the output terminal, the detection unit configured to detect, at start-up, whether or not an external inductor is connected to the output terminal, wherein the detection unit is further connected to the first control unit to activate the first operation mode when an external inductor is detected, and to the second control unit to activate the second operation mode when no external inductor is detected, wherein

the detection unit is further configured to detect in which of first and second distinct inductance ranges an inductance of the detected inductor lies so as to provide inductance dependent control in the first operation mode.

2. The power regulator according to claim 1 , wherein the detection unit is configured to detect the external inductor by determining a voltage difference between output terminals during a predetermined time period.

3. The power regulator according to claim 2 , wherein the detection unit comprises at least two comparators, each comparator being supplied with a distinct reference voltage.

4. The power regulator according to claim 2 , further comprising current ramp circuitry configured to provide a current ramp during the predetermined time period.

5. The power regulator according to claim 1 , wherein the detection unit comprises at least two comparators, each comparator being supplied with a distinct reference voltage.

6. The power regulator according to claim 5 , further comprising current ramp circuitry configured to provide a current ramp during the predetermined time period.

7. The power regulator according to claim 1 , further comprising current ramp circuitry configured to provide a current ramp during a predetermined time period.

8. The power regulator according to claim 1 , wherein the first operation mode is a linear mode.

9. The power regulator according to claim 1 , wherein the second operation mode is a switched mode.

10. An integrated circuit provided with a power regulator according to claim 1 .

11. A power regulator having a first operational mode and a second operational mode, the power regulator comprising:

an output terminal configured to a provide a regulated voltage;

a first control unit configured to control the power regulator in the first operational mode;

a second control unit configured to control the power regulator in the second operational mode; and

a detection unit connected to the output terminal, the detection unit configured to detect, at start-up, whether or not an external inductor is connected to the output terminal, wherein the detection unit is further connected to the first control unit to activate the first operation mode when an external inductor is detected, and to the second control unit to activate the second operation mode when no external inductor is detected, the detection unit is further arranged to detect in which of first and second distinct inductance ranges an inductance of the detected inductor lies so as to provide inductance dependent control in the first operation mode;

current ramp circuitry including a current mirror and a current source circuit, the current ramp circuitry configured to provide a current ramp during a predetermined time period.

12. The power regulator of claim 11 , wherein the first operation mode is a linear mode.

13. The power regulator of claim 11 , wherein the second operation mode is a switched mode.

14. A method comprising:

detecting, by a detection unit of a power regulator, at start-up, whether an external inductor is connected to an output terminal of the power regulator, wherein the detection unit is connected to an output terminal of the power regulator, the output terminal to provide a regulated voltage;

activating the power regulator in a first operation mode in response to the external inductor being detected;

activating the power regulator in a second operation mode in response to the external inductor not being detected;

detecting in which of first and second distinct inductance ranges an inductance of the detected inductor lies so as to provide inductance dependent control when the power regulator is in the first operation mode;

controlling, by a first control unit, the power regulator if the power regulator is in the first operational mode; and

controlling, by a second control unit, the power regulator if the power regulator is in the second operational mode.

15. The method of claim 14 , further comprising:

determining, by the detection unit, a voltage difference between output terminals during a predetermined time period to detect whether the external inductor connected to the output terminal.

16. The method of claim 14 , wherein the detection unit includes first and second comparators, each comparator being supplied with a distinct reference voltage.

17. The method of claim 14 , wherein the detection unit includes current ramp circuitry to provide a current ramp during a predetermined time period.

18. The method of claim 17 , wherein the current ramp circuitry comprises a current mirror and a current source circuit.

19. The method of claim 14 , wherein the first operation mode is a linear mode.

20. The method of claim 14 , wherein the second operation mode is a switched mode.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 20, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037565/0510 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 20, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037565/0527 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0859 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 6, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 036284/0105 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 6, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 036284/0363 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 6, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 036284/0339 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2015
From: RINCE, JEAN-CHRISTOPHE PATRICK; MANSRI, MOHAMMED; PUJOL, ALEXANDRE
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 035647/0191 →