Device with a conductive feature formed over a cavity and method therefor
View Patent ↗An embodiment of a device includes a semiconductor substrate, a transistor formed at the first substrate surface, a first conductive feature formed over the first substrate surface and electrically coupled to the transistor, and a second conductive feature covering only a portion of the second substrate surface to define a first conductor-less region. A cavity vertically aligned with the first conductive feature within the first conductor-less region extends into the semiconductor substrate. A dielectric medium may be disposed within the cavity and have a dielectric constant less than a dielectric constant of the semiconductor substrate. A method for forming the device may include forming a semiconductor substrate, forming a transistor on the semiconductor substrate, forming the first conductive feature, forming the second conductive feature, forming the conductor-less region, forming the cavity, and filling the cavity with the dielectric medium.
1. A device comprising:
a semiconductor substrate that includes a first substrate surface and a second substrate surface;
a transistor formed at the first substrate surface, wherein the transistor comprises a plurality of electrodes that include a control electrode, a first current-conducting electrode, and a second current-conducting electrode;
a first conductive feature formed over the first substrate surface and electrically coupled to one of the plurality of electrodes;
a second conductive feature coupled to the second substrate surface, wherein the second conductive feature includes an opening through which a portion of the second substrate surface is exposed to define a first conductor-less region along the second substrate surface;
a cavity within the first conductor-less region and extending into the semiconductor substrate, wherein the cavity is at least partially defined by an inner cavity surface that is recessed into the semiconductor substrate from the second substrate surface and is vertically aligned with the first conductive feature; and
a dielectric medium disposed within the cavity and in contact with the inner cavity surface that terminates on a dielectric medium surface parallel to the second substrate surface, the dielectric medium having a dielectric constant less than a dielectric constant of the semiconductor substrate, wherein the dielectric medium surface does not contact a conductive material.
2. The device of claim 1 , further comprising an active region that includes the control electrode, the first current-conducting electrode, and the second current-conducting electrode.
3. The device of claim 1 , further comprising an isolation region that includes the first conductive feature.
4. The device of claim 1 , wherein the first conductive feature is configured as a transmission line.
5. The device of claim 1 , wherein the first conductive feature is configured as an inductor.
6. The device of claim 1 , wherein the semiconductor substrate further comprises a host substrate overlain by one or more semiconductor layers selected from gallium-polar group III-nitride semiconductor materials or nitrogen-polar group III-nitride semiconductor materials.
7. The device of claim 6 , wherein the one or more semiconductor layers comprise:
a buffer layer;
a channel layer disposed over the buffer layer; and
a barrier layer disposed over the channel layer, wherein top substrate surface is over the barrier.
8. The device of claim 7 , wherein the inner cavity surface is at least partially defined by a lower surface of the buffer layer.
9. The device of claim 6 , wherein the host substrate is selected from silicon carbide (SiC), sapphire, silicon, gallium nitride, aluminum nitride, diamond, boron nitride, poly-SiC, silicon on insulator, gallium arsenide, and indium phosphide.
10. The device of claim 1 , wherein the first current carrying electrode is configured as a drain electrode, and the second current carrying electrode is configured as a source electrode.
11. The device of claim 1 , wherein the dielectric medium is selected from benzocyclobutene (BCB), polymide, epoxy, and spin-on glass.
12. A device comprising:
a semiconductor substrate with a first substrate surface and a second substrate surface, wherein the semiconductor substrate includes a host substrate and a group-III nitride semiconductor layer disposed over the host substrate;
a transistor comprising a drain contact, a source contact, and a gate electrode, wherein the gate electrode is formed over the semiconductor layer in an active region and is electrically coupled to a channel, and wherein an electrical signal applied to the gate electrode controls electrical current flow in the channel between the drain contact and the source contact;
a first conductive feature formed over the first substrate surface in an isolation region wherein the first conductive feature is electrically coupled to a transistor electrode selected from the gate electrode, the drain contact, and the source contact;
a second conductive feature coupled to the second substrate surface, wherein the second conductive feature includes an opening through which a portion of the second substrate surface is exposed to define a first conductor-less region along the second substrate surface;
a cavity within the first conductor-less region and extending into the semiconductor substrate, wherein the cavity is at least partially defined by an inner cavity surface that is recessed into the semiconductor substrate from the second substrate surface, and the inner cavity surface is vertically aligned below the first conductive feature; and
a dielectric medium disposed within the cavity and in contact with the inner cavity surface that terminates on a dielectric medium surface parallel to the second substrate surface, the dielectric medium having a dielectric constant less than a dielectric constant of the semiconductor substrate, wherein the dielectric medium surface does not contact a conductive material.
13. The device of claim 12 , wherein the host substrate is selected from silicon carbide (SiC), sapphire, silicon, gallium nitride, aluminum nitride, diamond, boron nitride, poly-SiC, silicon on insulator, gallium arsenide, and indium phosphide.
14. The device of claim 12 , wherein the first conductive feature comprises an inductor.
15. The device of claim 12 , wherein the first conductive feature comprises a transmission line.