Limiting electronic package warpage with semiconductor chip lid and lid-ring

1. A method to fabricate an electronic package comprising:

electronically coupling a semiconductor chip to a carrier;

attaching a lid to the carrier to enclose the semiconductor chip, the lid comprising a perimeter recess, wherein the perimeter recess is within the upper half of the lid and comprises a horizontal recess and a vertical recess comprising two vertical recess sidewalls;

attaching a lid-ring to the lid within the perimeter recess, the lid ring comprising a horizontal portion orthogonal and distally connected to a vertical portion, wherein the horizontal portion comprises a greater width than height, is parallel with the semiconductor chip, and is juxtaposed within the horizontal recess, and wherein the vertical portion comprises a greater height than width and is juxtaposed between the two vertical recess sidewalls, wherein a perimeter sidewall of the lid-ring horizontal portion is coplanar with a perimeter sidewall of the lid; and

contracting the lid-ring against the upper half of the lid to exert a reverse bending moment upon the lid.

2. The method of claim 1 , wherein the lid is in thermal contact with the semiconductor chip.

3. The method of claim 1 , wherein a top surface of the lid and a top surface the lid-ring are coplanar.

4. The method of claim 1 , wherein the lid and the lid-ring are the same material.

5. The method of claim 1 , wherein the lid is fabricated from copper and the lid-ring is fabricated from aluminum.

6. The method of claim 1 , wherein attaching the lid to the carrier further comprises:

curing a first seal band at a predetermined first elevated temperature.

7. The method of claim 6 , wherein attaching the lid-ring to the perimeter of the lid further comprises:

curing a second seal band at a second elevated temperature, the second elevated temperature greater than the first predetermined elevated temperature.

8. The method of claim 7 , further comprising:

cooling the electronic package from the second elevated temperature.

9. A method comprising:

electrically connecting an electronic package to a system board, the electronic package comprising a carrier including a top surface and a bottom surface configured to be electrically connected to the system board, a semiconductor chip electrically connected to the top surface, a lid attached to the top surface that encloses semiconductor chip, the lid having a perimeter recess within the upper half of the lid and comprising a horizontal recess and a vertical recess comprising two vertical recess sidewalls, and a lid-ring within the perimeter recess, the lid ring comprising a horizontal portion orthogonal and distally connected to a vertical portion, wherein the horizontal portion comprises a greater width than height, is parallel with the semiconductor chip, and is juxtaposed within the horizontal recess, and wherein the vertical portion comprises a greater height than width and is juxtaposed between the two vertical recess sidewalls, wherein a perimeter sidewall of the lid-ring horizontal portion is coplanar with a perimeter sidewall of the lid, wherein the lid-ring contracts against the upper half of the lid to exert a reverse bending moment upon the lid; and

thermally attaching a heat sink to the electronic package with a thermal interface material there between.

10. The method of claim 9 , wherein the lid is in thermal contact with the semiconductor chip.

11. The method of claim 10 , wherein a top surface of the lid and a top surface the lid-ring are coplanar.

12. The method of claim 10 , wherein the lid is fabricated from copper and the lid-ring is fabricated from aluminum.

13. A method to fabricate an electronic package comprising:

electronically coupling a semiconductor chip to a carrier;

attaching a lid to the carrier to enclose the semiconductor chip, the lid comprising a perimeter recess, wherein the perimeter recess is within the upper half of the lid and comprises a horizontal recess and a vertical recess;

attaching a lid-ring to the lid within the perimeter recess, the lid ring comprising a horizontal portion orthogonal and distally connected to a vertical portion, wherein the horizontal portion comprises a greater width than height, is parallel with the semiconductor chip, and is juxtaposed within the horizontal recess, and wherein the vertical portion comprises a greater height than width and is juxtaposed within the vertical recess, wherein a perimeter sidewall of the lid-ring vertical portion is coplanar with a perimeter sidewall of the lid; and

contracting the lid-ring against the upper half of the lid to exert a reverse bending moment upon the lid.

14. The method of claim 13 , wherein the lid is in thermal contact with the semiconductor chip.

15. The method of claim 13 , wherein a top surface of the lid and a top surface the lid-ring are coplanar.

16. The method of claim 13 , wherein the lid and the lid-ring are the same material.

17. The method of claim 13 , wherein the lid is fabricated from copper and the lid-ring is fabricated from aluminum.

18. The method of claim 13 , wherein attaching the lid to the carrier further comprises:

curing a first seal band at a predetermined first elevated temperature.

19. The method of claim 18 , wherein attaching the lid-ring to the perimeter of the lid further comprises:

curing a second seal band at a second elevated temperature, the second elevated temperature greater than the first predetermined elevated temperature.

20. The method of claim 19 , further comprising:

cooling the electronic package from the second elevated temperature.