Semiconductor devices and methods of making the same
In one embodiment, methods for making semiconductor devices are disclosed.
1. A semiconductor device comprising:
a conductive substrate electrically coupled to a first lead, wherein the conductive substrate comprises a first elevated region on a first side of the conductive substrate and second elevated region on the first side of the conductive substrate, wherein the first elevated region comprises a first planar surface on the first side of the conductive substrate, and wherein the second elevated region comprises a second planar surface on the first side of the conductive substrate; and
a semiconductor die comprising a first contact pad electrically coupled to the conductive substrate, wherein the first contact pad is soldered to both the first planar surface of the first elevated region and the second planar surface of the second elevated region, and wherein the first planar surface of the first elevated region has different dimensions than the second planar surface of the second elevated region, and wherein the first planar surface of the first elevated region has a first corner that is laterally aligned with a first corner of the first contact pad.
2. The semiconductor device of claim 1 , wherein the conductive substrate comprises at least 10 elevated regions.
3. The semiconductor device of claim 2 , wherein a number of the elevated regions on the first side of the conductive substrate is greater than a number of the elevated regions on the first side of the conductive substrate soldered to the semiconductor die.
4. The semiconductor device of claim 1 , wherein the conductive substrate and the semiconductor die are at least partially encapsulated in a molding material.
5. The semiconductor device of claim 4 , wherein the molding material is disposed between the first elevated region and the second elevated region.
6. The semiconductor device of claim 1 , wherein the second planar surface of the second elevated region has a second corner that is laterally aligned with a second corner of the first contact pad.
7. The semiconductor device of claim 1 , wherein the first planar surface of the first elevated region has a second corner that is laterally aligned with a second corner of the first contact pad.
8. The semiconductor device of claim 1 , wherein the conductive substrate further comprises a third elevated region on the first side of the conductive substrate, wherein the third elevated region comprises a third planar surface on the first side of the conductive substrate, and wherein the first contact pad is soldered to the third planar surface of the third elevated region.
9. The semiconductor device of claim 8 , wherein the first planar surface of the first elevated region has a first corner that is laterally aligned with a first corner of the first contact pad, wherein the second planar surface of the second elevated region has a second corner that is laterally aligned with a second corner of the first contact pad, and wherein the third planar surface of the third elevated region has a third corner that is laterally aligned with a third corner of the first contact pad.
10. The semiconductor device of claim 1 , wherein only a portion of the first planar surface of the first elevated region is soldered to the first contact pad.
11. A semiconductor device comprising:
a conductive substrate electrically coupled to a first lead, wherein the conductive substrate comprises a first elevated region on a first side of the conductive substrate, a second elevated region on the first side of the conductive substrate, and a third elevated region on the first side of the conductive substrate, wherein the first elevated region comprises a first planar surface on the first side of the conductive substrate, wherein the second elevated region comprises a second planar surface on the first side of the conductive substrate, and wherein the third elevated region comprises a third planar surface on the first side of the conductive substrate; and
a semiconductor die comprising a first contact pad and a second contact pad electrically coupled to the conductive substrate, wherein the first contact pad is soldered to the first planar surface of the first elevated region and the second contact pad is soldered to the second planar surface of the second elevated region, and wherein the third planar surface of the third elevated region is not soldered to the semiconductor die, and wherein the third planar surface of the third elevated region is laterally positioned away from a footprint of the semiconductor die.
12. The semiconductor device of claim 11 , wherein the conductive substrate further comprises a fourth elevated region on the first side of the conductive substrate, wherein the fourth elevated region comprises a fourth planar surface on the first side of the conductive substrate, and wherein fourth elevated region is laterally positioned away from the footprint of the semiconductor die.
13. The semiconductor device of claim 11 , wherein the conductive substrate and the semiconductor die are at least partially encapsulated in a molding material.
14. The semiconductor device of claim 13 , wherein the molding material is disposed between the first elevated region and the second elevated region.
15. The semiconductor device of claim 11 , wherein the first planar surface of the first elevated region has a first corner that is laterally aligned with a first corner of the first contact pad.
16. The semiconductor device of claim 15 , wherein the second planar surface of the second elevated region has a second corner that is laterally aligned with a first corner of the second contact pad.
17. The semiconductor device of claim 15 , wherein the first planar surface of the first elevated region has a second corner that is laterally aligned with a second corner of the first contact pad.
18. The semiconductor device of claim 11 , wherein the first planar surface of the first elevated region has different dimensions than the second planar surface of the second elevated region.
19. A semiconductor device comprising:
a conductive substrate electrically coupled to a first lead, wherein the conductive substrate comprises a first elevated region on a first side of the conductive substrate, a second elevated region on the first side of the conductive substrate, and a third elevated region on the first side of the conductive substrate, wherein the first elevated region comprises a first planar surface on the first side of the conductive substrate, wherein the second elevated region comprises a second planar surface on the first side of the conductive substrate, and wherein the third elevated region comprises a third planar surface on the first side of the conductive substrate; and
a semiconductor die comprising a first contact pad and a second contact pad electrically coupled to the conductive substrate, wherein the first contact pad is soldered to the first planar surface of the first elevated region and the second contact pad is soldered to the second planar surface of the second elevated region, and wherein the third planar surface of the third elevated region is not soldered to the semiconductor die, and wherein a portion of the third planar surface of the third elevated region is laterally positioned away from a footprint of the semiconductor die.
20. The semiconductor device of claim 19 , wherein the conductive substrate and the semiconductor die are at least partially encapsulated in a molding material, and wherein the molding material is disposed between the first elevated region and the second elevated region.