Granted Patent B2

US 9,836,808 · App. 14/746,980 · Granted Dec 5, 2017

Abstract

Claims (59)

1. An apparatus for verifying the integrity of image data comprising mapped texture data, said apparatus comprising:

a first frame buffer and a second frame buffer each provided to buffer displayable image data;

a first texture buffer provided to store first texture data;

a second texture buffer to store second texture data;

a graphics processing pipeline comprising a fragment shader circuitry with a first texture sampler circuitry and a second texture sampler circuitry,

wherein the fragment shader circuitry is coupled to the first and second frame buffers and the at least one texture buffer, the fragment shader circuitry to receive fragment data,

wherein the first texture sampler circuitry to perform texture sampling on the fragment data based on the first texture data stored in the first texture buffer, and to output texture mapped fragments as image data to the first frame buffer,

wherein the second texture sampler circuitry to perform texture sampling on the fragment data based on the second texture data stored in the second texture buffer, and to output texture mapped fragments as image data to the second frame buffer;

a comparator circuit coupled to the first and second frame buffers,

wherein the comparator circuitry is configured

to compare the image data stored in the first frame buffer with the image data stored in the second frame buffer; and

to issue a fault indication signal in case the image data of the first frame buffer and the second frame buffer mismatch, wherein the fault indication identifies a fault in texture mapping of the fragment shader circuitry.

2. The apparatus according to claim 1 , further comprising:

wherein the first texture sampler circuitry is configured to read texture data from the at least one texture buffer in response to the received fragment data;

wherein the second texture sampler circuitry is configured to read texture data from the at least one texture buffer in response to the received fragment data.

3. The apparatus according to claim 1 , further comprising:

wherein the second texture buffer is provided buffer texture data replicated from the first texture buffer.

4. The apparatus according to claim 3 ,

wherein the first texture sampler circuitry is configured to read texture data from the first texture buffer in response to the received fragment data;

wherein the second texture sampler circuitry is configured to read texture data from the second texture buffer in response to the received fragment data.

5. The apparatus according to claim 1 , further comprising:

a rasterizer circuitry comprised by the graphics processing pipeline and configured to generate the fragment data;

wherein the fragment shader circuitry is coupled to the rasterizer circuitry and configured to receive the fragment data from the rasterizer circuitry.

6. The apparatus according to claim 1 ,

wherein the first texture sampler circuitry and the second first texture sampler circuitry are configured to apply the same filtering operation on the texture data read from the at least one texture buffer.

7. A method for verifying the integrity of image data comprising mapped texture data, said method comprising:

providing a first frame buffer and a second frame buffer each provided to buffer displayable image data;

providing a first texture buffer with first texture data;

providing a second texture buffer with second texture data;

configuring a first texture sampler circuitry at a fragment shader circuitry of a graphics processing pipeline to perform texture sampling on the fragment data based on the first texture data stored in the first texture buffer, and to output texture mapped fragments as image data to the first frame buffer,

configuring a second texture sampler circuitry at the fragment shader circuitry of the graphics processing pipeline to perform texture sampling on the fragment data based on the second texture data stored in the second texture buffer, and to output texture mapped fragments as image data to the first frame buffer;

comparing the image data stored in the first frame buffer with the image data stored in the second frame buffer; and

issuing a fault indication signal in case the image data of the first frame buffer and the second frame buffer mismatch, wherein the fault indication identifies a fault in texture mapping of the fragment shader circuitry.

8. The method according to claim 7 , further comprising:

reading texture data by the first texture sampler circuitry from the at least one texture buffer in response to the received fragment data; and

reading texture data by the second texture sampler circuitry from the at least one texture buffer in response to the received fragment data.

9. The method according to claim 7 , further comprising:

replicating the texture data of the first texture buffer in the second texture buffer.

10. The method according to claim 9 , further comprising:

reading texture data by the first texture sampler circuitry from the first texture buffer in response to the received fragment data; and

reading texture data by the second texture sampler circuitry from the second texture buffer in response to the received fragment data.

11. The method according to claim 7 , further comprising:

generating the fragment data at a rasterizer circuitry, which is comprised by the graphics processing pipeline and coupled to the fragment shader circuitry.

12. The method according to claim 7 , further comprising:

configuring the first texture sampler circuitry and the second first texture sampler circuitry to apply the same filtering operation on the texture data read from the at least one texture buffer.

13. A non-transitory, tangible computer readable storage medium bearing computer executable instructions for verifying the integrity of image data comprising mapped texture data, when executing on one or more processing devices, cause the one or more processing devices to perform a method comprising:

configuring a first texture sampler circuitry at a fragment shader circuitry of a graphics processing pipeline to output texture mapped fragments of received fragment data based on texture map data in a first texture buffer as image data to the first frame buffer;

configuring a second texture sampler circuitry at the fragment shader circuitry of the graphics processing pipeline to output texture mapped fragments of the received fragment data based on the texture map data in a second texture buffer as image data to the second frame buffer;

comparing the image data stored in the first frame buffer with the image data stored in the second frame buffer; and

issuing a fault indication signal in case the image data of the first frame buffer and the second frame buffer mismatch, wherein the fault indication identifies a fault in texture mapping of the fragment shader circuitry.

14. The non-transitory, tangible computer readable storage medium of claim 13 , the method further comprising:

replicating the texture data of the first texture buffer in the second texture buffer.

15. The non-transitory, tangible computer readable storage medium of claim 14 , the method further comprising:

reading texture data by the first texture sampler circuitry from the first texture buffer in response to the received fragment data; and

reading texture data by the second texture sampler circuitry from the second texture buffer in response to the received fragment data.

16. The non-transitory, tangible computer readable storage medium of claim 13 , the method further comprising:

generating the fragment data at a rasterizer circuitry, which is comprised by the graphics processing pipeline and coupled to the fragment shader circuitry.

17. The non-transitory, tangible computer readable storage medium of claim 13 , the method further comprising:

configuring the first texture sampler circuitry and the second first texture sampler circuitry to apply the same filtering operation on the texture data read from the at least one texture buffer.

Assignments (15)