IP Library Granted Patent US 9,589,838
Granted Patent B2
US 9,589,838 · App. 14/752,402 · Granted Mar 7, 2017

Contact structure of semiconductor device

Inventors: Sung-Li Wang (Zhubei, TW); Ding-Kang Shih (New Taipei, TW); Chin-Hsiang Lin (Hsin-Chu, TW); Sey-Ping Sun (Hsin-Chu, TW); Clement Hsingjen Wann (Carmel, NY)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L21/76888H01L21/76802H01L21/76831H01L21/76843H01L21/76856H01L23/485H01L29/0684H01L29/41783H01L29/41791H01L29/66636H01L21/0262H01L21/02532H01L21/02579H01L21/02639H01L2924/0002
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Quick Facts
Patent No.
US 9,589,838
App. No.
14/752,402
Granted
Mar 7, 2017
Kind
B2
Abstract

The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an inter-layer dielectric (ILD) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and a metal layer filling a coated opening of the dielectric layer.

Claims (45)

1. A method of fabricating a semiconductor device, the method comprising:

forming a conductive region on a substrate;

forming a first dielectric layer over the substrate;

forming an opening in the first dielectric layer, at least a portion of the conductive region being exposed in the opening;

forming a first metal layer along a bottom of the opening;

converting the first metal layer to a second dielectric layer; and

forming a second metal layer over the second dielectric layer, the second dielectric layer being interposed between the conductive region and the second metal layer.

2. The method of claim 1 , further comprising:

forming a trench in the substrate; and

forming the conductive region in the trench, wherein the conductive region has a different lattice constant than a lattice constant of the substrate.

3. The method of claim 1 , wherein the conductive region comprises a source/drain region.

4. The method of claim 1 , wherein the converting comprises exposing the first metal layer to an oxygen-containing environment, the exposing forming an oxygen-containing film over the first metal layer.

5. The method of claim 4 , wherein the oxygen-containing film comprises a metal oxide.

6. The method of claim 4 , wherein the converting further comprises, after exposing the first metal layer to the oxygen-containing environment, exposing the oxygen-containing film to an inert gas.

7. The method of claim 6 , wherein the inert gas comprises N2, He, or Ar.

8. The method of claim 6 , wherein the exposing the oxygen-containing film to an inert environment is performed at a temperature of about 200° C. to about 800° C.

9. The method of claim 6 , wherein a thickness of the second dielectric layer is between 1 nm and 10 nm.

10. A method of fabricating a semiconductor device, the method comprising:

forming a transistor on a substrate, the transistor having a source/drain region;

forming a first dielectric layer over the source/drain region;

forming an opening in the first dielectric layer, at least a portion of the source/drain region being exposed in the opening;

forming a conductive oxide layer along a bottom of the opening; and

forming a first metal layer over the oxide layer, wherein the conductive oxide layer is interposed between the source/drain region and the first metal layer.

11. The method of claim 10 , wherein the forming the conductive oxide layer comprises:

forming a conductive layer along the bottom of the opening; and

converting the conductive layer to the oxide layer.

12. The method of claim 11 , wherein the conductive layer is a metal layer.

13. The method of claim 11 , wherein the converting comprises:

forming an oxygen-containing film over the conductive layer; and

exposing the oxygen-containing film to an inert environment.

14. The method of claim 13 , wherein the forming the oxygen-containing film over the conductive layer comprises exposing the conductive film to an oxygen-containing environment.

15. A method of fabricating a semiconductor device, the method comprising:

receiving a substrate comprising a major surface and a trench below the major surface;

epi-growing a strained material in the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate;

forming an inter-layer dielectric (ILD) layer over the strained material;

forming an opening in the ILD layer to expose a portion of the strained material;

forming a first metal layer along sidewalls and a bottom of the opening and extending over the ILD layer;

treating the first metal layer to form a dielectric layer over the strained material; and

forming a second metal layer over the dielectric layer in the opening.

16. The method of claim 15 , wherein the step of treating the first metal layer is performed by exposing a surface of the first metal layer to an oxygen-containing environment to form an oxygen-containing film.

17. The method of claim 16 , wherein the oxygen-containing environment comprising H2O, O2, or O3.

18. The method of claim 16 , wherein the step of treating the first metal layer further comprises:

exposing a surface of the oxygen-containing film to an inert gas after exposing the surface of the first metal layer to an oxygen-containing environment.

19. The method of claim 18 , wherein the inert gas comprises N2, He, or Ar.

20. The method of claim 18 , wherein the step of exposing the surface of the oxygen-containing film to an inert gas is performed at a temperature of about 200° C. to about 800° C.

Continuity (2)
Division 13629109 · Sep 27, 2012
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