IP Library Granted Patent US 9,466,675
Granted Patent B2
US 9,466,675 · App. 14/779,924 · Granted Oct 11, 2016

Method of manufacturing silicon carbide semiconductor device

Inventors: Tomihito Miyazaki (Osaka, JP); Chikayuki Okamoto (Itami, JP)
Assignee: Sumitomo Electric Industries, Ltd.
H01L29/1608H01L21/0217H01L21/02126H01L21/02164H01L21/02694H01L21/049H01L21/0465H01L21/311H01L21/3115H01L23/544H01L29/0619H01L29/66068H01L29/78H01L29/7827H01L2223/54426H01L2223/54453H01L2924/0002
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,466,675
App. No.
14/779,924
Granted
Oct 11, 2016
Kind
B2
Abstract

A recess is formed by partially etching a silicon carbide substrate. A mask layer is formed on the silicon carbide substrate by means of photolithography using the recess as an alignment mark. An impurity is implanted into the silicon carbide substrate using the mask layer. The silicon carbide substrate is annealed. After the annealing, a first electrode layer is deposited on the silicon carbide substrate. The first electrode layer is patterned by means of photolithography using the recess in the silicon carbide substrate as an alignment mark.

Claims (21)

1. A method of manufacturing a silicon carbide semiconductor device, comprising the steps of:

forming a recess in a silicon carbide substrate by partially etching said silicon carbide substrate;

forming a mask layer having a pattern on said silicon carbide substrate by means of photolithography using said recess in said silicon carbide substrate as an alignment mark;

implanting an impurity into said silicon carbide substrate using said mask layer;

annealing said silicon carbide substrate in order to activate said impurity;

after said step of annealing said silicon carbide substrate, depositing a first electrode layer on said silicon carbide substrate; and

patterning said first electrode layer by means of photolithography using said recess in said silicon carbide substrate as an alignment mark.

2. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein

said step of annealing said silicon carbide substrate is performed at 1500° C. or more and 2000° C. or less.

3. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of, before said step of forming a mask layer, forming a protecting film made of a material different from each of a material for said mask layer and silicon carbide on said recess.

4. The method of manufacturing a silicon carbide semiconductor device according to claim 3 , further comprising the step of, after said step of implanting an impurity, removing said protecting film.

5. The method of manufacturing a silicon carbide semiconductor device according to claim 4 , wherein

said step of removing said protecting film is performed before said step of annealing said silicon carbide substrate.

6. The method of manufacturing a silicon carbide semiconductor device according to claim 5 , wherein

said material for said protecting film has a melting point of 1500° C. or less.

7. The method of manufacturing a silicon carbide semiconductor device according to claim 5 , wherein

said material for said protecting film contains at least one of silicon oxide, silicon nitride and silicon oxynitride.

8. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of, after said step of patterning said first electrode layer, forming a second electrode layer on said silicon carbide substrate by means of photolithography using said recess in said silicon carbide substrate as an alignment mark.

9. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein

said step of patterning said first electrode layer includes the step of forming a mark portion by partially removing said first electrode layer, and

said method further comprises the step of forming a second electrode layer on said silicon carbide substrate by means of photolithography using said mark portion of said first electrode layer as an alignment mark.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2015
From: MIYAZAKI, TOMIHITO; OKAMOTO, CHIKAYUKI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 036651/0071 →
Priority Claims (1)
JP 2013-092491 · Apr 25, 2013 · national
Continuity (1)
Related Publication 20160056241A1 · Feb 25, 2016