IP Library Granted Patent US 9,627,487
Granted Patent B2
US 9,627,487 · App. 14/784,560 · Granted Apr 18, 2017

Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

Inventors: Kenji Hiratsuka (Osaka, JP); Yu Saitoh (Osaka, JP); Takeyoshi Masuda (Osaka, JP)
Assignee: Sumitomo Electric Industries, Ltd.
H01L29/1608H01L21/02238H01L21/02255H01L21/049H01L21/0475H01L21/3065H01L21/3081H01L21/31111H01L29/4236H01L29/42368H01L29/66068H01L29/7397H01L29/7813H01L29/045
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Quick Facts
Patent No.
US 9,627,487
App. No.
14/784,560
Granted
Apr 18, 2017
Kind
B2
Abstract

A silicon carbide substrate has first to third semiconductor layers. The first and third semiconductor layers have a first conductivity type, and the second semiconductor layer has a second conductivity type. A trench has a bottom surface and first to third side surfaces, the bottom surface being constituted of the first semiconductor layer, the first to third side surfaces being respectively constituted of the first to third semiconductor layers. A gate insulating film having a bottom portion and a side wall portion is provided on the trench. The bottom portion has a minimum thickness d 0 . A portion of the side wall portion on the second side surface has a minimum thickness d 1 . A portion, connected to the bottom portion, of the side wall portion on the first side surface has a thickness d 2 . Moreover, d 2 >d 1 and d 2 >d 0 are satisfied.

Claims (32)

1. A method for manufacturing a silicon carbide semiconductor device comprising steps of:

preparing a silicon carbide substrate including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, said first semiconductor layer having a first conductivity type, said second semiconductor layer being provided on said first semiconductor layer, said second semiconductor layer having a second conductivity type, said third semiconductor layer being provided on said second semiconductor layer, said third semiconductor layer being separated from said first semiconductor layer by said second semiconductor layer, said third semiconductor layer having said first conductivity type;

forming a trench in said silicon carbide substrate, said trench including a bottom surface and a side wall surface, said bottom surface being constituted of said first semiconductor layer, said side wall surface having first to third side surfaces respectively constituted of said first to third semiconductor layers, said trench having a corner portion formed by said first side surface and said bottom surface meeting each other;

forming a gate insulating film on said trench, said gate insulating film having a bottom portion and a side wall portion, said bottom portion covering said bottom surface, said side wall portion being connected to said bottom portion, said side wall portion covering said side wall surface, said bottom portion having a minimum thickness d 0 , a portion of said side wall portion on said second side surface having a minimum thickness d 1 , said side wall portion having a portion that is connected to said bottom portion on said first side surface and that has a thickness d 2 , d 2 >d 1 and d 2 >d 0 being satisfied, the step of forming said gate insulating film including steps of forming a corner insulating film to cover said corner portion and at least partially expose said second side surface of said trench and thermally oxidizing said trench after forming said corner insulating film; and

forming a gate electrode on said trench with said gate insulating film being interposed therebetween;

wherein the step of forming said corner insulating film includes steps of:

forming a covering insulating film to cover said trench; and

etching back said covering insulating film;

wherein the step of forming said covering insulating film includes steps of:

forming a first insulating film on said trench; and

forming, after the step of forming said first insulating film, a second insulating film to cover a portion of said first insulating film on said corner portion and at least partially expose a portion of said first insulating film on the second side surface; and

wherein the step of forming said second insulating film includes steps of:

forming, after the step of forming said first insulating film, a silicon film to cover a portion of said first insulating film on the corner portion and at least partially expose a portion of said first insulating film on the second side surface; and

oxidizing said silicon film.

2. The method for manufacturing the silicon carbide semiconductor device according to claim 1 , wherein the step of etching back said covering insulating film is performed by wet etching.

3. The method for manufacturing the silicon carbide semiconductor device according to claim 1 , wherein

the step of forming said silicon film includes steps of:

forming a deposited film to cover said trench by depositing silicon;

forming a resist layer by applying a resist liquid to fill said trench with said deposited film being interposed therebetween;

patterning said resist layer by etching back said resist layer such that said resist layer partially remains in said trench; and

etching said deposited film using said resist layer as a mask after the step of patterning said resist layer.

4. A method for manufacturing a silicon carbide semiconductor device comprising steps of:

preparing a silicon carbide substrate including a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, said first semiconductor layer having a first conductivity type, said second semiconductor layer being provided on said first semiconductor layer, said second semiconductor layer having a second conductivity type, said third semiconductor layer being provided on said second semiconductor layer, said third semiconductor layer being separated from said first semiconductor layer by said second semiconductor layer, said third semiconductor layer having said first conductivity type;

forming a trench in said silicon carbide substrate, said trench including a bottom surface and a side wall surface, said bottom surface being constituted of said first semiconductor layer, said side wall surface having first to third side surfaces respectively constituted of said first to third semiconductor layers, said trench having a corner portion formed by said first side surface and said bottom surface meeting each other;

forming a gate insulating film on said trench, said gate insulating film having a bottom portion and a side wall portion, said bottom portion covering said bottom surface, said side wall portion being connected to said bottom portion, said side wall portion covering said side wall surface, said bottom portion having a minimum thickness d 0 , a portion of said side wall portion on said second side surface having a minimum thickness d 1 , said side wall portion having a portion that is connected to said bottom portion on said first side surface and that has a thickness d 2 , d 2 >d 1 and d 2 >d 0 being satisfied, the step of forming said gate insulating film including steps of forming a corner insulating film to cover said corner portion and at least partially expose said second side surface of said trench and thermally oxidizing said trench after forming said corner insulating film; and

forming a gate electrode on said trench with said gate insulating film being interposed therebetween;

wherein the step of forming said corner insulating film includes steps of:

forming a covering insulating film to cover said trench; and

etching back said covering insulating film; and

wherein said covering insulating film has a bottom portion and a side wall portion, said bottom portion being located on said bottom surface, said side wall portion being located on said side wall surface so as to be connected to said bottom portion, and

the step of forming said covering insulating film is performed by forming a thermal oxidation film on said trench such that said side wall portion has a maximum thickness at a location connected to said bottom portion.

5. The method for manufacturing the silicon carbide semiconductor device according to claim 4 , wherein the step of forming said thermal oxidation film is performed by thermal oxidation at a temperature of less than 1300° C.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2015
From: HIRATSUKA, KENJI; SAITOH, YU; MASUDA, TAKEYOSHI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 036794/0709 →
Priority Claims (1)
JP 2013-085734 · Apr 16, 2013 · national
Continuity (1)
Related Publication 20160064490A1 · Mar 3, 2016