IP Library Granted Patent US 9,910,348
Granted Patent B2
US 9,910,348 · App. 14/788,296 · Granted Mar 6, 2018

Method of simultaneous lithography and etch correction flow

Inventors: Geng Han (Fishkill, NY); Scott M. Mansfield (Hopewell Junction, NY); Dominique Nguyen-Ngoc (Lake Peekskill, NY); Donald J. Samuels (Silverthorne, CO); Ramya Viswanathan (Austin, TX)
Assignee: GLOBALFOUNDRIES INC.
G03F1/36G06F17/5081G03F1/144G06F17/5068G06F2217/12H01L21/0274
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Quick Facts
Patent No.
US 9,910,348
App. No.
14/788,296
Granted
Mar 6, 2018
Kind
B2
Abstract

A method of mask correction where two independent process models are analyzed and co-optimized simultaneously. In the method, a first lithographic process model simulation is run on a computer system that results in generating a first mask size in a first process window. Simultaneously, a second hard mask open etch process model simulation is run resulting in generating a second mask size in a second process window. Each first lithographic process model and second hard mask open etch process model simulations are analyzed in a single iterative loop and a common process window (PW) optimized between lithography and etch is obtained such that said first mask size and second mask size are centered between said common PW. Further, an etch model form is generated that accounts for differences in an etched pattern due to variation in three-dimensional photoresist profile, the model form including both optical and density terms that directly relate to an optical image.

Claims (44)

1. A method of modifying a photomask design comprising:

running, on a computer system, a first lithographic process model simulation that results in generating line or space features of a mask in a first process window;

running, on the computer system, a second etch process model simulation resulting in the generating of line or space features of said mask in a second process window;

determining whether a line feature or a space feature resulting from running each said first process model simulation and second process model simulation meet a respective line feature specification and space feature specification; and

modifying a mask design within a single iteration of an iterative loop process such that the simulated line feature or the simulated space feature are within each of a respective minimum critical dimension (CD) specification; and such that a common process window (PW) optimized between lithography and etch is obtained, wherein said lithographic and etch processes are simultaneously co-optimized within the iterative loop processing.

2. The method of claim 1 , wherein both first and second process models run simultaneously in each iteration to result in an optimized mask size solution that avoids independent fails from each model.

3. The method of claim 1 , further comprising:

specifying a minimum lithographic critical dimension (CD) that ensures successful printing of a lithographic CD feature; and

specifying a minimum etch CD that ensures successful printing of a etch CD feature.

4. The method of claim 3 , further comprising:

applying a weighting between the first process window and the second etch process window to accelerate a convergence that results in an optimized mask size solution having features meeting both a minimum lithographic CD specification and a minimum etch CD specifications.

5. The method of claim 3 , wherein the common process window (PW) for co-optimized lithographic process and etch process provides a centered range of post lithographic critical dimension CD optimized for inclusion with a post etch CD.

6. The method of claim 3 , further comprising:

while generating OPC code in said iterative processing loop,

tuning both said lithographic process model and said etch process model using calculations within the same processing loop to set values for said minimum lithographic CD specification and for said minimum etch CD specification.

7. The method of claim 6 , wherein said tuning comprises:

specifying whether a mask fragment of said mask design needs to be modified in a positive or negative direction; and

using calculations within the single iteration to set a mask fragment design movement based on a simulation that results in a lithographic or etch CD feature that is not within the minimum lithographic CD specification or minimum etch CD specification.

8. The method of claim 1 , further comprising:

running an optical imaging model to generate optical parameters based on said mask design; and in said single iteration,

using said optical image parameters in each said first lithographic process model simulation and using said optical image parameters in said second etch process model simulation as a proxy for a 3D resist profile.

9. A system of modifying a photomask design comprising:

a memory storage device;

a hardware processor in communication with said memory storage device and configured to:

run a first lithographic process model simulation that results in generating line or space features of a mask in a first process window;

run a second etch process model simulation resulting in the generating of line or space features of said mask in a second process window;

determine whether a line feature or a space feature resulting from running each said first process model simulation and second process model simulation meet a respective line feature specification and space feature specification; and

modify a mask or mask fragment design within a single iteration of an iterative loop process such that the simulated line feature or the simulated space feature are within each of a respective minimum critical dimension (CD) specification; and such that a common process window (PW) optimized between lithography and etch is obtained, wherein said lithographic and etch processes are simultaneously co-optimized within the iterative loop processing.

10. The system of claim 9 , wherein both first and second process models run simultaneously in each iteration to result in an optimized mask size solution that avoids independent fails from each model.

11. The system of claim 9 , wherein said hardware processor is further configured to:

specify a minimum lithographic critical dimension (CD) that ensures successful printing of a lithographic CD feature; and

specify a minimum etch CD that ensures successful printing of a etch CD feature.

12. The system of claim 11 , wherein said hardware processor is further configured to:

apply a weighting between the first process window and the second process window to accelerate a convergence that results in an optimized mask size solution meeting both a minimum lithographic CD specification and a minimum etch CD specifications.

13. The system of claim 11 , wherein the common process window (PW) for co-optimized lithographic process and etch process provides a centered range of post lithographic critical dimension CD optimized for inclusion with a post etch CD.

14. The system of claim 11 , wherein said hardware processor is further configured to:

generate OPC code in said iterative processing loop, and

tune both said first lithographic process model and said second etch process model using calculations within the same processing loop to set values for said minimum lithographic CD specification and for said minimum etch CD specification.

15. The system of claim 14 , wherein to tune, said hardware processor is further configured to:

specify whether a mask fragment of said mask design needs to be modified in a positive or negative direction; and

using calculations within the single iteration to set a mask fragment design movement based on a simulation that results in a lithographic or etch CD feature that is not within the minimum lithographic CD specification or minimum etch CD specification.

16. The system of claim 9 , wherein said hardware processor is further configured to:

run an optical imaging model to generate optical parameters based on said mask design; and in said single iteration

use said optical image parameters in each said first lithographic process model simulation and using said optical image parameters in said second etch process model simulation as a proxy for a 3D resist profile.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2016
From: HAN, GENG; MANSFIELD, SCOTT M.; NGUYEN-NGOC, DOMINIQUE; SAMUELS, DONALD J.; VISWANATHAN, RAMYA
To: GLOBALFOUNDRIES INC.
Reel/Frame 039513/0274 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2016
From: GLOBALFOUNDRIES U.S. 2 LLC
To: GLOBALFOUNDRIES INC.
Reel/Frame 038224/0720 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2016
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 037941/0684 →
Continuity (1)
Related Publication 20170004233A1 · Jan 5, 2017