IP Library › Granted Patent US 9,900,989
Granted Patent B2
US 9,900,989 · App. 14/817,418 · Granted Feb 20, 2018

Printed circuit board and method of manufacturing the same

Inventors: Yong Jik Lee (Busan, KR); Jung Kyung Sung (Busan, KR); Bong Wan Koo (Changwon-si, KR); Hyun Duck Lim (Busan, KR)
Assignee: Samsung Electro-Mechanics Co., Ltd.
H05K1/186H05K3/4602H05K3/4697H01L23/5389H01L2924/0002H05K3/429
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Quick Facts
Patent No.
US 9,900,989
App. No.
14/817,418
Granted
Feb 20, 2018
Kind
B2
Abstract

The object of the present invention is to provide a printed circuit board formed with a cavity to mount a semiconductor chip.

Claims (21)

1. A printed circuit board comprising:

a core substrate;

a first insulation layer stacked on the core substrate and formed with a circuit layer including a via and a pad;

a prepreg layer stacked on a surface of the first insulation layer;

a second insulation layer formed on a surface of the prepreg layer; and

an outer layer circuit layer formed on the second insulation layer,

wherein the second insulation layer and the prepreg layer are different materials from each other,

wherein the prepreg layer and the second insulation layer integrally form an insulation layer such that no other circuit layer is formed between the circuit layer of the first insulation layer and the outer layer circuit layer, and

wherein a cavity penetrating the prepreg layer and the second insulation layer and using the first insulation layer as a bottom surface thereof is formed.

2. The printed circuit board according to claim 1 , wherein the first insulation layer and the second insulation layer are each a prepreg, and the prepreg layer has a lower flowability than the first insulation layer and the second insulation layer.

3. The printed circuit board according to claim 1 , wherein the via is exposed to the cavity and has a protection layer formed on a surface thereof.

4. The printed circuit board according to claim 1 , wherein a semiconductor chip is mounted on the cavity.

5. The printed circuit board according to claim 1 , wherein the printed circuit board additionally includes an outer conductive pattern on the second insulation layer and a solder resist that is formed on the outer conductive pattern.

6. A printed circuit board that equips a cavity for mounting a semiconductor chip, wherein the printed circuit board comprises a core layer and a build-up layer,

wherein the core layer comprises a core substrate, a first insulation layer stacked on a surface of the core substrate, and a circuit layer including a via and a pad and formed on the first insulation layer,

wherein the build-up layer comprises a prepreg layer, a second insulation layer formed on the prepreg layer, and an outer layer circuit layer formed on the second insulation layer,

wherein the second insulation layer and the prepreg layer are different materials from each other,

wherein the prepreg layer and the second insulation layer integrally form an insulation layer such that no other circuit layer is formed between the circuit layer of the first insulation layer and the outer layer circuit layer, and

wherein the cavity penetrating the prepreg layer and the second insulation layer and using the first insulation layer as a bottom surface thereof is formed.

7. The printed circuit board according to claim 6 , wherein the first insulation layer and the second insulation layer are each a prepreg, and the prepreg layer has a lower flowability than the first insulation layer and the second insulation layer.

8. The printed circuit board according to claim 6 , wherein the via is exposed to the cavity and has a protection layer formed on a surface thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2015
From: LEE, YONG JIK; SUNG, JUNG KYUNG; KOO, BONG WAN; LIM, HYUN DUCK
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 036450/0508 →
Priority Claims (1)
KR 10-2014-0099873 · Aug 4, 2014 · national
Continuity (1)
Related Publication 20160037646A1 · Feb 4, 2016