Wiring substrate and method for manufacturing wiring substrate

1. A wiring substrate comprising:

an insulating layer including upper and lower surfaces;

a wiring layer including upper, lower, and side surfaces and being in a position that is recessed relative to the upper surface of the insulating layer;

a via wiring formed in the insulating layer and connected to the lower surface of the wiring layer; and

a solder resist layer formed on the upper surface of the insulating layer;

wherein the via wiring includes a first part contacting the lower surface of the wiring layer and a second part exposed from the lower surface of the insulating layer, the first part having an area smaller than an area of the second part,

wherein the wiring layer includes a pad body that constitutes a part of a pad and a wiring pattern including an upper surface,

wherein the solder resist layer includes an upper surface and an opening that exposes the pad and a part of the upper surface of the insulating layer,

wherein the solder resist layer buries a step part formed by the upper surface of the insulating layer and the upper surface of the wiring pattern,

wherein the pad includes

the pad body including upper and lower surfaces, the lower surface of the pad body contacting the first part of the via wiring,

a first metal layer formed on the upper surface of the pad body, the first metal layer including an embedded part embedded in the insulating layer and a projecting part projecting from the upper surface of the insulating layer, the projecting part including upper and side surfaces of the first metal layer which is exposed from the upper surface of the insulating layer, and

a second metal layer including an upper surface and covering the upper and side surfaces of the projecting part of the first metal layer,

wherein the upper surface of the pad body and the upper surface of the wiring pattern are on the same plane, and

wherein the upper surface of the second metal layer is positioned lower than the upper surface of the solder resist layer.

2. The wiring substrate as claimed in claim 1 ,

wherein the upper surface of the pad body is a smooth surface, and

wherein the upper surface of the wiring pattern is a roughened surface.

3. The wiring substrate as claimed in claim 1 , wherein the upper surface of the insulating layer is a roughened surface.

4. The wiring substrate as claimed in claim 1 , further comprising:

a second wiring layer formed on a side of the lower surface of the insulating layer; and

a second solder resist layer formed on the side of the lower surface of the insulating layer and including a second opening that selectively exposes the second wiring layer;

wherein the second wiring layer includes a lower outer edge part that is covered by the second solder resist layer,

wherein the second wiring layer includes a lower center part that is exposed in the second opening,

wherein the lower outer edge part of the second wiring layer has a roughness that is the same as a roughness of the upper surface of the wiring pattern, and

wherein the lower center part of the second wiring layer has a roughness that is the same as a roughness of the upper surface of the pad body.

5. The wiring substrate as claimed in claim 1 , wherein the pad is configured to be connected to a bonding wire.

6. The wiring substrate as claimed in claim 1 , wherein the pad body is formed of copper, the first metal layer is formed of nickel, and the second metal layer is formed of gold.

7. The wiring substrate as claimed in claim 1 , wherein the insulating layer includes a reinforcement member.